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Title:
HALL SENSOR
Document Type and Number:
WIPO Patent Application WO/2022/197177
Kind Code:
A1
Abstract:
A Hall sensor comprising a CMOS Hall plate with multiple electrical contacts arranged in positions along a periphery of the Hall plate for administering a current through the CMOS Hall plate in diverse directions, wherein the CMOS Hall plate comprises a single central source (S) and multiple split drains (D1, D2) arranged around the single central source (S) for multiple radial source – drain currents, wherein with every combi-nation of a source (S) and a split drain (D1, D2), an in-dividual gate (G) is provided between said source (S) and said split drain (D1, D2) for tuning a gate voltage to be applied to such combination of source (S) and split drain (D1, D2).

Inventors:
FRENCH PATRICK JAMES (NL)
Application Number:
PCT/NL2022/050104
Publication Date:
September 22, 2022
Filing Date:
February 24, 2022
Export Citation:
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Assignee:
UNIV DELFT TECH (NL)
International Classes:
G01R33/07; G01R33/06
Foreign References:
US20030206011A12003-11-06
US20050121700A12005-06-09
US20200166583A12020-05-28
Other References:
SIU SIK-LAM ET AL: "Sensitivity distortion of split-drain MAGFET under alternating magnetic field", 2013 IEEE INTERNATIONAL CONFERENCE OF IEEE REGION 10 (TENCON 2013), IEEE, 1 November 2015 (2015-11-01), pages 1 - 3, XP032845173, ISSN: 2159-3442, ISBN: 978-1-4799-2825-5, [retrieved on 20160105], DOI: 10.1109/TENCON.2015.7373061
SAN-DRA BELLEKOMSONG YINANTON BAKKER: "Spinning current Hall plate with integrated switches", THE PROCEEDINGS OF THE PRORISC WORKSHOP ON CIRCUITS, 1997, pages 37 - 42
Attorney, Agent or Firm:
VAN BREDA, Jacques (NL)
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Claims:
CLAIMS

1. A Hall sensor comprising a CMOS Hall plate with multi ple electrical contacts arranged in positions along a periph ery of the Hall plate for administering a current through the CMOS Hall plate in diverse directions, characterized in that the CMOS Hall plate comprises a single central source (S) and multiple split drains (Dl, D2) arranged around the single cen tral source (S) for multiple radial source - drain currents, wherein with every combination of a source (S) and a split drain (Dl, D2), an individual gate (G) is provided between said source (S) and said split drain (Dl, D2) for tuning a gate voltage to be applied to such combination of source (S) and split drain (Dl, D2).

2. The Hall sensor according to claim 1, characterized in that the single central source (S) and the multiple split drains (Dl, D2) arranged around the single central source (S) are arranged to be simultaneously operational.

3. The Hall sensor according to claim 1 or 2, characterized in that the gates (G) of all combinations of the single source (S) and the split drains (Dl, D2) are tunable for each to receive during operation a gate voltage attuned to a same value for each such combination of source (S) and split drain (Dl, D2).

Description:
Hall sensor

The invention relates to a Hall sensor comprising a CMOS Hall plate with multiple electrical contacts arranged in positions along a periphery of the Hall plate for administer ing a current through the CMOS Hall plate in diverse direc tions.

Hall sensors are commonly known and applied to sense magnetic fields. In particular Hall sensors are used to meas ure the amplitude and/or the direction of the magnetic field.

A known problem of a Hall sensor is that it suffers from offset. To resolve the problem of offset the article "Spinning current Hall plate with integrated switches" by San dra Bellekom, Song Yin, and Anton Bakker, published in the Proceedings of the ProRISC workshop on circuits, systems and signal processing 1997, pages 37 - 42 proposes a Hall sensor comprising a Hall plate with multiple electrical contacts con nected or connectable to switches arranged in positions along a periphery of the Hall plate, said switches being connectable via switch control logic to an input terminal for a current source and to an output terminal for measuring a voltage, re spectively, wherein said switch control logic provides during operation a sequence of consecutive bias currents in multiple directions through the Hall plate as determined by the switch control logic.

A disadvantage of the known spinning current Hall sensor is however that it is slow because of the consecutive processing of the bias currents in multiple directions, as well as the large amount of complex electronics to drive and monitor the Hall sensor.

It is an object of the invention to reduce the com plexity in using the Hall sensor, or in other words to reduce the complexity of the required electronics.

It is another object of the invention to speed up processing of the measurement results that come available with the Hall sensor, without sacrificing its accuracy in relation to the offset.

The Hall sensor of the invention is provided with the features of one or more of the appended claims. In a first aspect of the invention the CMOS Hall plate comprises a single central source and multiple split drains arranged around the single central source for multiple radial source - drain currents, wherein with every combination of a source and a split drain, an individual gate is provided between said source and said split drain for tuning a gate voltage to be applied to such combination of source and split drain.

It is remarked that the application of a split drain is known as such from CMOS technology. When applied in a Hall sensor the gate voltage can be used to maximise the sensitivi ty by decreasing the channel depth. Accordingly this construc tion ensures a high sensitivity of the Hall sensor measure ments. By applying multiple split drains arranged around the single central source for maintaining multiple radial source - drain currents, this high sensitivity of the Hall sensor is combined with a solution for the offset problem by the multi ple split drain arrangement, whereas the measurement speed can be tremendously improved since the multiple radial source - drain currents can be applied simultaneously. Accordingly, it is one of the preferable features of the invention that the single central source and the multiple split drains arranged around the single central source are arranged to be simultane ously operational.

It is further preferable that the gates of all combi nations of the single source and the split drains are tunable for each to receive during operation a gate voltage attuned to a same value for each such combination of source and split drain.

The invention will hereinafter be further elucidated with reference to the drawing of a schematic top view at an exemplary embodiment of a Hall sensor plate according to the invention that is not limiting as to the appended claims.

The drawing shows that the CMOS Hall plate comprises a single central source (S) and multiple split drains (Dl, D2) arranged around the single central source (S) for multiple ra dial source - drain currents, wherein with every combination of a source and a split drain, an individual gate (G) is pro vided between said source (S) and said split drain (Dl, D2) for tuning a gate voltage to be applied to such combination of source and split drain.

The single central source S and the multiple split drains Dl, D2 arranged around the single central source S are arranged to be simultaneously operational.

Further the gates G of all combinations of the single source S and the split drains Dl, D2 are tunable for each to receive during operation a gate voltage attuned to a same val ue for each such combination of source S and split drain Dl, D2.

Although the invention has been discussed in the foregoing with reference to an exemplary embodiment of the Hall sensor of the invention, the invention is not restricted to this particular embodiment which can be varied in many ways without departing from the invention. The discussed exemplary embodiment shall therefore not be used to construe the append ed claims strictly in accordance therewith. On the contrary the embodiment is merely intended to explain the wording of the appended claims without intent to limit the claims to this exemplary embodiment. The scope of protection of the invention shall therefore be construed in accordance with the appended claims only, wherein a possible ambiguity in the wording of the claims shall be resolved using this exemplary embodiment.