Title:
HARDWARE DEVICE ACCESS MANAGEMENT METHOD AND SYSTEM
Document Type and Number:
WIPO Patent Application WO/2017/185952
Kind Code:
A1
Abstract:
Disclosed is a hardware device access management method, comprising: when it is detected that a hardware device accesses a predetermined interface, a serving end establishing a connection with the hardware device, and creating a monitoring thread; when a connection request from a client is monitored, the monitoring thread creating a serving thread serving for the connection request; and the service thread receiving a protocol data packet sent from the client, invoking a corresponding function to establish a connection with the interface according to the protocol data packet, and serializing an output parameter of the function and then returning same to the client, so that the client de-serializes the output parameter of the function, then writes same into a function parameter table and then returns same to a corresponding upper-layer application by means of a driver. Also disclosed is a hardware device access management system, so that the upper-layer application can securely establish a connection with the hardware device in the case of having no root right.
Inventors:
LIANG JIANMING (CN)
XIONG FEI (CN)
CHEN MINGYU (CN)
ZHANG YUNRUI (CN)
LUO ZHONGMING (CN)
XIONG FEI (CN)
CHEN MINGYU (CN)
ZHANG YUNRUI (CN)
LUO ZHONGMING (CN)
Application Number:
PCT/CN2017/079355
Publication Date:
November 02, 2017
Filing Date:
April 01, 2017
Export Citation:
Assignee:
GRG BANKING EQUIPMENT CO LTD (CN)
GRG BANKING IT CO LTD (CN)
GRG BANKING IT CO LTD (CN)
International Classes:
H04L29/06; G06F9/44
Foreign References:
| CN106027487A | 2016-10-12 | |||
| CN104714760A | 2015-06-17 | |||
| CN103034811A | 2013-04-10 | |||
| CN103885763A | 2014-06-25 | |||
| CN1744591A | 2006-03-08 |
Attorney, Agent or Firm:
SCIHEAD PATENT AGENT CO., LTD. (CN)
Download PDF:
Previous Patent: VIDEO TRANSMISSION METHOD, BASE STATION, AND SYSTEM
Next Patent: DIGITAL FREQUENCY-DIVISION PHASE-LOCKED LOOP
Next Patent: DIGITAL FREQUENCY-DIVISION PHASE-LOCKED LOOP