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Patent Searching and Data


Title:
HIGH-LEVEL SYNTHESIS DEVICE, HIGH-LEVEL SYNTHESIS METHOD, AND PROGRAM RECORDING MEDIUM
Document Type and Number:
WIPO Patent Application WO/2017/135228
Kind Code:
A1
Abstract:
The purpose of the present invention is to reduce access latency. Provided is a high-level synthesis device 100, comprising a characteristic amount acquisition unit 103 and an implementation determination unit 105. By analyzing an access pattern in a communication among a plurality of modules, the characteristic amount acquisition unit 103 acquires access characteristic amounts which include characteristic amounts which relate to the communication among the plurality of modules. On the basis of the acquired access characteristic amounts, the implementation determination unit 105 determines an implementation format for use in communicating among the plurality of modules.

Inventors:
SHIBATA SEIYA (JP)
TAKENAKA TAKASHI (JP)
Application Number:
PCT/JP2017/003339
Publication Date:
August 10, 2017
Filing Date:
January 31, 2017
Export Citation:
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Assignee:
NEC CORP (JP)
International Classes:
G06F17/50
Foreign References:
JP2003091565A2003-03-28
JP2004054641A2004-02-19
JP2012022613A2012-02-02
Attorney, Agent or Firm:
SHIMOSAKA Naoki (JP)
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