Title:
HIGH-LINEARITY PHASE FREQUENCY DETECTOR
Document Type and Number:
WIPO Patent Application WO/2013/168325
Kind Code:
A1
Abstract:
A phase frequency detector realizes a highly linear conversion from noise-shaped ΣΔ modulation into charge quantities without degradation of phase locked loop (PLL) phase noise. The phase frequency detector may feature a construction of an Up signal output and a Down signal output, in which the Up signal rises when a divided VCO input rises, an Up signal falls when the divided VCO input falls, a Down signal rises when the divided VCO input rises, and a Down signal falls when a reference input rises. A mode selection input may be utilized for a fast lock-up PLL.
Inventors:
MORAND CEDRIC (FR)
CANARD DAVID (FR)
CANARD DAVID (FR)
Application Number:
PCT/JP2013/001258
Publication Date:
November 14, 2013
Filing Date:
February 28, 2013
Export Citation:
Assignee:
ASAHI KASEI MICRODEVICES CORP (JP)
International Classes:
H03L7/085
Foreign References:
| JP2002507850A | 2002-03-12 | |||
| JPH08139595A | 1996-05-31 |
Other References:
See also references of EP 2847861A4
Attorney, Agent or Firm:
TANI & ABE, P.C. (Akasaka 2-chome Minato-k, Tokyo 52, JP)
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