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Patent Searching and Data


Title:
HIGHLY P-DOPED VACANCY DOMINATED SILICON WAFERS SUBSTANTIALLY FREE OF OXIDATION INDUCED STACKING
Document Type and Number:
WIPO Patent Application WO2002056341
Kind Code:
A3
Abstract:
The present invention is directed to an epitaxial silicon wafer, as well as to a process for the preparation thereof, wherein the substrate wafer is highly P-doped, has silicon lattice vacancies as the predominant intrinsic point defect and is substantially free of oxidation induced stacking faults and the epitaxial silicon layer grown on the substrate wafer is substantially free of grown in oxidation induced stacking faults.

Inventors:
MOHR THOMAS C
STAGNO LUCIANO MULE
FEI LU
BANAN MOHSEN
BRIANZA ANTONELLA
Application Number:
PCT/US2001/047860
Publication Date:
May 01, 2003
Filing Date:
December 07, 2001
Export Citation:
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Assignee:
MEMC ELECTRONIC MATERIALS (US)
International Classes:
C30B15/00; (IPC1-7): C30B15/00; C30B15/14; C30B15/20; C30B29/06
Domestic Patent References:
WO1998045508A11998-10-15
Other References:
DORNBERGER E ET AL: "Influence of boron concentration on the oxidation-induced stacking fault ring in Czochralski silicon crystals", JOURNAL OF CRYSTAL GROWTH, NORTH-HOLLAND PUBLISHING CO. AMSTERDAM, NL, vol. 180, no. 3-4, 1 October 1997 (1997-10-01), pages 343 - 352, XP004113920, ISSN: 0022-0248
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 10 31 August 1999 (1999-08-31)
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 15 6 April 2001 (2001-04-06)
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