Title:
IC CARD AND IC CARD SYSTEM
Document Type and Number:
WIPO Patent Application WO/2002/048849
Kind Code:
A1
Abstract:
When data is transmitted from a system body (11) to an IC card (12) a clock signal is input in the clock input of an FF2R via (a buffer (CK1S) $m(7) a transmission path (CLK) $m(7) a buffer (CK2R)). A data signal is output from an FF1S in synchronism with a rising edge of the clock signal, and input and captured in the data input of the FF2R via (a buffer (101S) $m(7) a transmission path (DATA) $m(7) a buffer (102R)). When data is transmitted from the IC card (12) to the system body (11), the clock signal is input in the clock input of an FF1R via (a buffer (CK2S) $m(7) the transmission path (CLK) $m(7) a buffer (CL1R)). The data signal is output from an FF2S in synchronism with a rising edge of the clock signal, and input and captured in the data input of the FF1R via (a buffer (102S) $m(7) the transmission path (DATA) $m(7) a buffer (101R)).
More Like This:
| JPH02232719 | IC CARD SYSTEM |
| JPH03197196 | BRACELET-SHAPED NON-CONTACT RECORDING MEDIUM |
Inventors:
BANDO HIDEAKI (JP)
Application Number:
PCT/JP2001/010926
Publication Date:
June 20, 2002
Filing Date:
December 13, 2001
Export Citation:
Assignee:
SONY CORP (JP)
BANDO HIDEAKI (JP)
BANDO HIDEAKI (JP)
International Classes:
B42D15/10; G06F1/12; G06K7/00; G06K17/00; G06K19/07; (IPC1-7): G06F1/04; G06K17/00; G06K19/07
Foreign References:
| JPH10187275A | 1998-07-14 | |||
| JPH11514765A | 1999-12-14 | |||
| JP2001265716A | 2001-09-28 | |||
| JPS61148937A | 1986-07-07 | |||
| EP0525221A1 | 1993-02-03 |
Other References:
See also references of EP 1343066A4
Attorney, Agent or Firm:
Sugiura, Masatomo (Ikebukuro Park Bldg. 49-7 Minami Ikebukuro
2-chome Toshima-ku, Tokyo, JP)
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