Title:
III NITRIDE SEMICONDUCTOR SUBSTRATE, EPITAXIAL SUBSTRATE, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/040108
Kind Code:
A1
Abstract:
In a semiconductor device (100), a surface layer (12) contains a sulfide at a density of 30×1010 to 2000×1010 particles/cm2 in terms of S content and an oxide at a concentration of 2 to 20 at% in terms of O content. In the semiconductor device (100), the occurrence of pile-up of C in the interface between an epitaxial layer (22) and a III nitride semiconductor substrate (10) can be prevented. In this manner, by preventing the occurrence of pile-up of C, the formation of a high-resistance layer in the interface between an epitaxial layer (22) and a III nitride semiconductor substrate (10) can be prevented. Thus, the electrical resistance in the interface between the epitaxial layer (22) and the III nitride semiconductor substrate (10) can be reduced, and the crystal quality of the epitaxial layer (22) can be improved. Consequently, the luminous intensity and the yield of the semiconductor device (100) can be improved.
Inventors:
ISHIBASHI KEIJI (JP)
Application Number:
PCT/JP2010/061910
Publication Date:
April 07, 2011
Filing Date:
July 14, 2010
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES (JP)
ISHIBASHI KEIJI (JP)
ISHIBASHI KEIJI (JP)
International Classes:
C30B29/38; C23C16/34; C30B29/40; H01L21/205; H01L33/32
Foreign References:
JP4333820B1 | 2009-09-16 | |||
US6596079B1 | 2003-07-22 | |||
US6488767B1 | 2002-12-03 | |||
US3183335A | 1965-05-11 |
Other References:
See also references of EP 2484818A4
Attorney, Agent or Firm:
HASEGAWA Yoshiki et al. (JP)
Yoshiki Hasegawa (JP)
Yoshiki Hasegawa (JP)
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