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Title:
IMAGER WITH SUPPRESSION OF BACKGROUND LIGHT AND CORRESPONDING METHOD
Document Type and Number:
WIPO Patent Application WO/2011/020629
Kind Code:
A1
Abstract:
An imager comprises an illumination unit for illuminating a scene with intensity-modulated light; an oscillator for feeding an oscillating modulation signal to said illumination unit; an array of lock-in pixels, each of said pixels comprising at least two integration storages; a driver module operatively connected to said array of lock-in pixels to control each lock-in pixel to integrate charge induced therein during at least two time intervals corresponding to at least two phases of said modulation signal into a respective one of said integration storages, and to provide a set of response signals containing at least two response signals indicative of the charge integrated into the corresponding integration storages; and a processing unit configured to derive a modulation phase and a modulation amplitude of the light impinging on each of said lock-in pixels based on said set of response signals and to compute range information of said scene based on said measured modulation phase and to output said computed range information. The imager further comprises a detection module configured to detect a level of a DC component of the response signals, a charge compensation module and a control module operatively connected to said detection module and said charge compensation module, said control module to control said charge compensation module to compensate a predefined amount of the charges in said at least two integration storages if a predetermined level of the DC component is detected in said at least two integration storages.

Inventors:
BAUER ANDREAS (DE)
FRANKE MICHAEL (DE)
Application Number:
PCT/EP2010/055270
Publication Date:
February 24, 2011
Filing Date:
April 21, 2010
Export Citation:
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Assignee:
IEE SARL (LU)
BAUER ANDREAS (DE)
FRANKE MICHAEL (DE)
International Classes:
G01S17/08; G01S7/487; H04N5/335
Domestic Patent References:
WO2006113414A22006-10-26
Foreign References:
US7157685B22007-01-02
US6919549B22005-07-19
US7176438B22007-02-13
EP2116864A12009-11-11
Other References:
None
Attorney, Agent or Firm:
OFFICE FREYLINGER (Strassen, LU)
Download PDF:
Claims:
Claims

1. Imager, configured to operate according to the time-of-flight principle, comprising

an illumination unit for illuminating a scene with intensity-modulated light;

an oscillator operatively connected to said illumination unit for feeding an oscillating modulation signal to said illumination unit;

an array of lock-in pixels, each of said lock-in pixels comprising at least two integration storages;

an optical system for imaging said scene onto said array of lock-in pixels and causing light scattered in said scene to impinge on said lock-in pixels;

a driver module operatively connected to said array of lock-in pixels to control each lock-in pixel to integrate charge induced therein by said impinging light during at least two time intervals corresponding to at least two phases of said modulation signal into a respective one of said at least two integration storages, and to provide a set of response signals containing at least two response signals indicative of the charge integrated during the at least two time intervals into the corresponding one of said at least two integration storages; and

a processing unit configured to derive a modulation phase and a modulation amplitude of the light impinging on each of said lock-in pixels based on said set of response signals and to compute range information of said scene based on said measured modulation phase and to output said computed range information;

characterized by a detection module configured to detect a level of a DC component of the response signals, a charge compensation module and a control module operatively connected to said detection module and said charge compensation module, said control module to control said charge compensation module to compensate a predefined amount of the charges in said at least two integration storages if a predetermined level of the DC component is detected in said at least two integration storages.

2. The imager according to claim 1 , wherein said detection module is configured to detect a voltage at a respective sense node associated to each of said at least two integration storages, and wherein the control module activates said charge compensation module if the voltage at said sense nodes exceeds a predetermined threshold value.

3. The imager according to claim 1 or 2, wherein said charge compensation module is configured to supply, upon activation by the control module, a predefined charge packed to each of said at least two integration storages.

4. The imager according to claim 3, wherein said predefined charge packet is sequentially supplied to each to said at least two integration storages.

5. The imager according to any one of claims 1 to 4, wherein said charge compensation module comprises a controlled current source, which may be sequentially switched to be operatively connected to a respective sense node associated to each of said at least two integration storages.

6. The imager according to any one of claims 1 to 4, wherein said charge compensation module comprises a capacitance, which may be precharged with a predetermined voltage and which may be sequentially switched to be operatively connected to a respective sense node associated to each of said at least two integration storages.

Description:
IMAGER WITH SUPPRESSION OF BACKGROUND LIGHT AND

CORRESPONDING METHOD

Technical field

[0001] The present invention generally relates to optical sensors with differential signal integration over time and more specifically to a range camera operating according to the time-of-flight principle and to a method for acquiring a range image using such camera.

Background Art

[0002] Systems for creating a 3-D representation of a given portion of space have a variety of potential applications in many different fields. Examples are automotive sensor technology (e.g. vehicle occupant detection and classification), robotic sensor technology (e.g. object identification) or safety engineering (e.g. plant monitoring) to name only a few. As opposed to conventional 2-D imaging, a 3-D imaging system requires depth information about the target scene. In other words, the distances between one or more observed objects and an optical receiver of the system need to be determined. A well-known approach for distance measurement, which is used e.g. in radar applications, consists in timing the interval between emission and echo-return of a measurement signal. This so called time-of-flight (TOF) approach is based on the principle that, for a signal with known propagation speed in a given medium, the distance to be measured is given by the product of the propagation speed and the time the signal spends to travel back and forth.

[0003] In case of optical imaging systems, the measurement signal consists of light waves. For the purposes of the present description, the term "light" is to be understood as including visible, infrared (IR) and ultraviolet (UV) light.

[0004] Distance measurement by means of light waves generally requires varying the intensity of the emitted light in time. The TOF method can e.g. be implemented using the phase-shift technique or the pulse technique. With the phase-shift technique, the amplitude of the emitted light is periodically modulated (e.g. by sinusoidal modulation) and the phase of the modulation at emission is compared to the phase of the modulation at reception. With the pulse technique, light is emitted in discrete pulses without the requirement of periodicity.

[0005] In phase-shift measurements, the modulation period is typically in the order of twice the difference between the maximum measurement distance and the minimum measurement distance divided by the velocity of light. In this approach, the propagation time interval is determined as phase difference by means of a phase comparison between the emitted and the received light signal.

[0006] The principles of range imaging based upon time-of-flight measurements are described in detail in EP 1 152 261 A1 (to Lange and Seitz) and WO 98/10255 (to Schwarte). A more detailed description of the technique can be found in Robert Lange's doctoral thesis "3D Time-of-Flight Distance Measurement with Custom Sol id-State Image Sensors in CMOS/CCD-Technology" (Department of Electrical Engineering and Computer Science at University of Siegen). A method of operating a time-of-flight imager pixel that allows detecting of saturation is disclosed in WO 2007/014818 A1.

[0007] Figure 29 shows the architecture of a state-of-art time-of-flight sensor or camera 100. Light with modulated intensity is generated under the control of a modulation signal by a light source 110 and radiated against an object or scene 120. Furthermore ambient light is present (represented as emanating from an outside light source 130) and radiates also onto the scene 120. Both components (modulated light and ambient light) are mixed and reflected at the scene 120. A portion of the reflected light is finally received at the optics 140 of the camera 100 and is passed to the sensor pixel matrix 150. In the sensor pixel matrix 150 the impinging light, which comprises a component from the non-modulated ambient light and a component from the intensity modulated light, is converted into an electrical signal for the determination of the phase information.

[0008] Each pixel 160 of the pixel matrix 150 comprises a photo detector and a demodulator for demodulating the incoming signal. The pixel 160 is fed with a demodulation signal, which is derived from the modulation signal. Under the control of the demodulation signal, each pixel 160 integrates the charge generated therein by the impinging light during at least two time intervals, each of which corresponds to a different phase within one period of the modulation signal. Each pixel 160 provides response signals indicating the integrated charge for the different time intervals. This raw phase information is sometimes referred to as "tap values" or "tap responses" according to the nomenclature of Robert Lange's doctoral thesis. To simplify computation of the phase difference between the received light and the modulation signal, one normally chooses four integration intervals corresponding to phases separated by 90°. For each pixel, one thus retrieves four tap values (called AO, A1 , A2, A3 from now on) per picture taken. The tap values are converted into phase information by a phase calculation unit. With four tap values, the phase difference φ is calculated as follows:

φ = atan2(A3 - Al, A2 -A0) (eqn. 1 ) where atan2(x,y) is the four-quadrant inverse tangent function, yielding the angle between the positive x-axis of a plane and the point with coordinates (x, y) on that plane.

[0009] As the light impinging on the range imager comprises a component from the non-modulated ambient light, a considerable part of the charges generated and integrated in the pixel is not related to the modulated light and thus to distance information to be determined. The signal at the output of the pixel therefore comprises a component which results from the charges induced in the pixel by the non-modulated ambient light (hereinafter referred to as DC component) and a component resulting from the charges induced in the pixel by the intensity modulated light (hereinafter referred to as AC component).

[0010] Accordingly the overall performance of the range imager suffers from background illumination measured along with the actual signal. The ambient light or background illumination can e.g. cause saturation of the sense node if its intensity is very high, or the ambient light can deteriorate the contrast between the charge sensing devices. As a result, the precision for the detection of the phase and the spatial distribution of the impinging radiation is low. It is therefore very important to compensate the influence of background light.

[0011] One solution to this problem has been proposed in international patent application WO 2006/113414 A2. This document discloses to use a differential pixel detector, in which the differential signal resulting from the AC component of the light is transferred into a storage capacitor and the DC component of the signal is dropped so only the differential signal resulting from the AC component of the light is stored and converted.

[0012] Other solutions have been proposed in which the DC component of the signal is continuously compensated by current mirrors or by some kind of high pass filtering of the imager signal. However in most of the hitherto proposed solutions, the maximum received background power is limited to a factor of about 10 above the received AC signal power due to mismatch effects. Hence there is a need for improved background suppression which allows to significantly increase the signal to background ratio.

Technical problem

[0013] It is an object of the present invention to provide an improved method and corresponding circuitry for eliminating the effect of background light. This object is solved by an imager according to claim 1.

General Description of the Invention

[0014] An imager, which is configured to operate according to the time-of-flight principle, comprises an illumination unit for illuminating a scene with intensity- modulated light; an oscillator operatively connected to said illumination unit for feeding an oscillating modulation signal to said illumination unit; an array of lock-in pixels, each of said lock-in pixels comprising at least two integration storages, which can physically be a gates, but also diffusion nodes or any other capacitances; an optical system for imaging said scene onto said array of lock-in pixels and causing light scattered in said scene to impinge on said lock-in pixels; a driver module operatively connected to said array of lock-in pixels to control each lock-in pixel to integrate charge induced therein by said impinging light during at least two time intervals corresponding to at least two phases of said modulation signal into a respective one of said at least two integration storages, and to provide a set of response signals containing at least two response signals indicative of the charge integrated during the at least two time intervals into the corresponding one of said at least two integration storages; and a processing unit configured to derive a modulation phase and a modulation amplitude of the light impinging on each of said lock-in pixels based on said set of response signals and to compute range information of said scene based on said measured modulation phase and to output said computed range information. According to the invention, the imager further comprises a detection module configured to detect a level of a DC component of the response signals (i.e. a component of the response signals which results from the charges induced in the pixel by the non-modulated background light), a charge compensation module and a control module operatively connected to said detection module and said charge compensation module, said control module to control said charge compensation module to compensate a predefined amount of the charges in said at least two integration storages if a predetermined level of the DC component is detected in said at least two integration storages.

[0015] It will be noted that in a preferred embodiment of the invention, each of said lock-in pixels comprises four integration storages and each lock-in pixel integrates charge induced therein by said impinging light during four time intervals corresponding to four phases of said modulation signal into a respective one of said four integration storages. This embodiment allows to simplify computation of the phase difference between the received light and the modulation signal according to the above mentioned formula. It shoud however be noted that the described principle of DC suppression also works with three or even only two time intervals. The latter embodiment leads to two response signals, which form together one differential response signal. The problem to get more than two response signals per period in a final constructed frame can i.e. be solved by capturing first an image with 0°+180°, in a second step an image with 90°+270° and than combining them.

[0016] With the imager according to the invention, the DC component of the response signal is directly monitored and controlled during the integration of the charges into the integration storages. This operation may be carried out continuously and not just at specific time intervals so that the dependency from low frequency DC amplitudes is advantageously reduced. The fact that the DC component is compensated by subtracting in the integration storages an amount of charges which is related to the accumulated DC component enables to significantly increase the signal to background ratio of the response signals and thus to improve the determination of the distance to be measured.

[0017] In a preferred embodiment, said detection module is configured to detect a voltage at a respective sense node associated to each of said at least two integration storages, and wherein the control module activates said charge compensation module if the voltage at said sense nodes exceeds a predetermined threshold value. The accumulated charge in the integration storages results in a voltage at the associated sense node due to the sense node capacitance. This voltage at the sense nodes can be easily measured in order to determine the necessity of charge compensation. As the acceptable voltage range at the sense nodes is limited by the associated devices and the supply voltages, the robustness of the distance determination is greatly enhanced by the direct control of the DC affected voltage levels.

[0018] It will be appreciated, that the determination of the sense node voltage is preferred to the detection of the photo currents, as the low photo currents are difficult to measure without influencing the signal.

Description of Preferred Embodiments

[0019] The present invention will be more apparent from the following description of several not limiting embodiments with reference to the attached drawings, wherein

Fig. 1 : generally illustrates the concept of a time-of-flight imager;

Fig. 2: illustrates the different functional modules of a pixel;

Fig. 3: shows the different functional modules of an embodiment of a DC compensation circuit;

Fig. 4: shows a possible implementation of a continuous compensation of the DC photo current;

Fig. 5: shows a possible implementation with a time discrete actor;

Fig. 6 & 7: illustrate a possible implementation with a time continuous actor;

Fig. 8: shows an embodiment with controlled current source; Fig. 9 & 10: illustrate an Implementation in which the actor comprises a switched capacitor;

Fig. 11." shows an implementation in a sigma-delta-converter-similar realization

Fig. 12: illustrates an overall control sequence of a method for DC suppression for the embodiment shown in Fig, 11;

Fig. 13: shows a possible graph for the resulting sense node potential during integration;

Fig, 14 & 15 1 illustrate the effect of non-ideal behavior of the different components; Fig, 16 to 20: show different aspects and effects of further embodiments;

Fig. 21 to 28: show different embodiments for a charge packet source

Fig. 29: shows the architecture of a state-of-art time-of-flight sensor,

[0020] The range finding sensor consists of a matrix 6 of pixels (Figure 1) Each pixel 7 measures a representation of the time of flight between the active illumination 10, the light reflecting scene 9 and the pixel, This representation of the measured time of flight is used to calculate the distance of the scene from the pixel and the illumination,

[0021] Each pixel 7 consists of a photo detector, a demodulator, DC suppression circuitry and maybe additional circuitry for other functions (Figure 2),, The different functional parts may be realised by common structures.

[0022] The demodulator may use a drift field in the substrate to enable high modulation frequencies. In that case it is not possible to compensate the DC charges before demodulation: there is no common node inside the demodulator to input complementary charge,, As a consequence DC charge must be compensated after the demodulator, for example at the storages of the demodulated signal,. The nodes connected to tie storages are commonly referred to as sense nodes,. Accordingly the output of the DC suppression circuit is operatively connected to the different sense nodes of the pixel.

[0023] The DC compensation circuit generally comprises (Figure 3) a detector, which measures the value of DC content or measures the need for DC compensation at the sense nodes, and an actor, which subtracts a required

RECTIFIED SHEET (Rule 91)

ISA/EP amount of current or charge from the sense nodes. The detector measures either the photo current in a defined time window or the corresponding accumulated charge, or the demodulated parts of the photo current or the corresponding accumulated charge.

[0024] In a preferred embodiment, the detector should measure the accumulated charge of the demodulated photo current. This embodiment confers among others the following advantages in case of a high DC-to-AC-ratio:

a) To control the real accumulation during integration and not just during special time windows reduces dependency from low frequency DC amplitudes. b) It is difficult to measure low photo currents without influence to the signal. c) The accumulated charge results in a voltage at the sense node due to the sense node capacitance. The acceptable range of voltages is limited by the devices and the supply voltage. So it increases robustness to control the DC affected voltage level directly.

[0025] The actor generates an average current to compensate the DC photo current. It applies this current to all sense nodes in the same quantity. Figure 4 shows a possible implementation of a continuous compensation of the DC photo current by means of current mirrors. Due to inevitable mismatches between the different current sources involved, such an implementation however suffers from a reduced efficiency in the suppression of the DC component.

[0026] In accordance with a preferred embodiment of the present invention, the actor therefore operates time discrete, wherein a defined charge packet is subtracted from the sense nodes, which can be done sequentially sense node by sense node from the same charge packet source to reduce mismatch errors. (Figure 5). In order to implement such a solution, a charge source is sequentially connected under the control of the control module at specific intervals to the different sense nodes of the pixel, thereby supplying a well defined charge packet to the respective sense node to subtract the corresponding DC induces charge in the respective integration storage. The advantage of the use of one single charge source for compensation the DC induced charges in all the integration storages reduces effectively the problem of mismatch which is commonly found in solutions having one compensation source per integration storage or associated sense node.

[0027] This time discrete solution enables the compensation of higher potential DC-to-AC-ratios than a time continuous solution by current mirrors, because of the avoidance of mismatch errors. To get the same properties with the time continuous version, some kind of mismatch cancellation (i.e. chopper technique) would be required (Figure 6, Figure 7). By such a complex chopper technique, the individual compensation sources (i.e. controlled current sources) are periodically shifted with respect to the different sense nodes, which means that the pairs of sense nodes and associated current source are periodically changed. A possible implementation of such a chopper technique is schematically illustrated in figures 6 and 7.

[0028] The charge source or time discrete actor may comprise a controlled current source, which may be sequentially switched to the different sense nodes. Such an embodiment is represented in Figure 8. The quantity of the charge Q ∞mp supplied by the time discrete actor is in this case defined by Q C omp=T * lo wherein T 1 represents the ON-time of the current I 0 , i.e. the time during which the current I 0 of the current source is switched to a sense node i.

[0029] In an alternative embodiment, schematically represented in Figure 9 and Figure 10, the charge source or time discrete actor may comprise a switched capacitor, which is precharged to the potential of the sense nodes. In this embodiment, the sense nodes are operated in sequence with the following procedure:

One sense node (i) is chosen to be the next one for charge subtraction ('the sense node in turn'). The sense nodes are labeled with 112.

1. (precharge ...): The potential of sense node (i) is measured without influence to the stored charge by the circuit 131 , and a copy of that potential is applied to node 138. The selection of the sense node (i) is done by the control signal 136. The switches 135 disconnect the nodes 112 from the node 140. The switch 132 connects the node 140 to the node 138. So the potential of node 140 settles to the copy of the potential of the chosen sense node (i). After settling the switch 132 is operated to disconnect the node 140 from the node 138.

2. (connect sense node (i)): One switch of the switches 135 corresponds to the sense node (i). This switch is now controlled to connect the sense node (i) to the node 140. Because of the node 140 being precharged to the same potential like the sense node (i), the quantity of charge that is currently stored in the sense node (i) does ideally not change with this step.

3. (rising edge): The potential of the 'upper' node of the capacitor (opposite to 140; 37 in Figure 10) is increased. As a consequence the potential of the sense node increases. The quantity of increase is defined by the ratio of this capacitor and the sense node capacitance. Due to the potential change also the charge of the sense node capacitor has changed. The quantity of charge change depends from the potential shift and the sense node capacitance.

4. (disconnect): The sense node (i) that was connected in step 2 is now disconnected. So the current charge stored at the sense node remains uneffected by further changes on node 140.

5. (falling edge): The potential of the 'upper' node of the capacitor (opposite to 140; 37 in Figure 10) is decreased. So it is in the state where a next sense node can be chosen and operated.

[0030] In case of such a switched capacitor implementation, quantity of the charge Q mp supplied by the time discrete actor is defined by Q C omp=C C omp * Uo, wherein C CO m P represents the capacitance of the switched compensation capacitor, which is discharged to sense node by voltage shift Uo and Uo represents the change of voltage over C ∞mp during sense node charging.

[0031] In both the above described implementations, the quantity of the resulting average current is defined by l C omp,average=Qcomp/T p , wherein T p is the time period of the charge packets related to one sense node.

[0032] The quantity of the compensation average current needs to be adapted to the average DC photo current, to keep the average stored DC charge zero. This adaptation can be done by adapting T p , T 1 and / or I 0 in the current source implementation or by adapting T p , Uo and / or C ∞m p in the capacitor implementation.

[0033] Adapting T p and keeping Q ∞mp constant yields a sigma-delta-converter- similar realization (see also Figure 11 ). In this embodiment, nodes 112 represent the sense nodes; reference numeral 102 represents a circuit like one of those shown in Figure 4, 5, 6 or 9. Reference numeral 104 is a detector comparator which enables to measure the sense node potential or a depending representation and compare it with a threshold 114 to make a decision on the need of DC subtraction. The comparator 104 further has a 'hold state' (activated by 115) to keep the 'need for DC subtraction'-signal alive until the subtraction operation is completed. Reference numeral 103 is a multiplexer with non-destructive access to the sense nodes (i.e. realized by one mosfet per sense node with its gate connected to the sense node and source and drain connected as a source follower to the detector. 116 represents the signal that marks the 'need for DC subtraction'. It will be noted, that for this embodiment, the circuits do not necessarily need to be placed inside the pixel.

[0034] The count of charge packets is proportional to the average DC photo current. It may be used as a measure therefore (active states on wire 116 need to be counted therefore). One big advantage is that the charging is done only when it is needed. This reduces clock-feed-through-errors to a minimum. For this reason, the adaptation of T p is preferred over the other possible embodiments.

[0035] Two variants of this embodiment are possible:

a) Tp may be controlled in discrete steps synchronously to system clock. Then the exact charge and voltage at the sense node before and after charging varies in a predictable range dependent on the exact ratio of DC and AC photo current and system clock. In this variant, reference numeral 105 represents a logical combination between signal 116 and global ('global' for all pixels independent from the need for DC subtraction of a specific pixel) signals 110 to chose a sense node for DC subtraction and to apply the sequence to the chosen sense node.

b) Alternatively control of T p may run free and asynchronously to system clock. Then the exact charge and voltage at the sense node before and after charging is just dependent from the AC photo current. But the control signals and their tinning must be generated inside the pixel (Figure 11 , part 105). In this variant, reference numeral 105 represents a timing generator, optionally controlled by signals 110.

[0036] A currently preferred embodiment of a method for DC suppression is illustrated with reference to Figure 12, which shows an example for an overall control sequence of the embodiment shown in Fig. 11 , and Figure 13, which shows a possible graph for the resulting sense node potential during integration. In fig. 12, the different reference numerals refer to the following signals: signal 121 : reset the pixel storage, signal 122: integrate the photo charge, signal 123: read out the pixel storages, signal 115: activate checking of 'need for DC subtraction' and the depending procedure of DC subtraction, signals 110: select and deselect the sense nodes one after another. This control method comprises the following steps: a) reset sense nodes (signal 121 )

b) start demodulation + accumulation of photo charge (signal 122)

c) continuously or cyclically for a defined period of time (parallel to demodulation + accumulation) :

i) compare sense node voltages with reference voltage: Have sense node voltages crossed the reference voltage (in the direction of photo charge accumulation)?

(1 ) yes: subtract Qcomp sequentially from each sense node (signals 110)

(2) no: do nothing

ii) after a defined time (if period c) still active): repeat i) (signal 115) d) stop demodulation

e) read out signal (signal 123)

[0037] It should be noted that DC suppression in step c) may be kept active even after demodulation (i.e. after step d)) to further compensate DC charge (may also origin from leakage) in the time between demodulation and readout of a specific row. (Figure 12) [0038] It will be noted, that the non-ideal behavior of the different components involved in the process constitutes potential error sources. These are for instance due to the dependency of Q m P from the sense node voltage Q mp = f(U sen se) (see also Figure 14), systematic errors of Q mp, the influence of history - for example influence of previously connected sense node or order of sense nodes with respect to timing or random errors (noise)

[0039] The dependency of Q mp from sense node voltage U sen se ("Qcomp = f(U S ense)") may cause signal charge accumulation saturation due to switching losses (Figure 15), which increases with ratio of incident DC to AC light power 'R DC '- Another possible error caused by the dependency of Q ∞mp from sense node voltage U sen se are phase errors due to higher order polynomial components in

Ucomp— T(Usense)-

[0040] The difference between the graphs of channel 1 and 2 in Figure 15 follow an exponential function over time T (t=0 is start of integration): Ud iff 12 = Udiff12,sat * (1 - exp(-tau/t)). Regarding the switching losses it will be appreciated that: Usense,sat = U S ense(Qerr/Qcomp = 1 /RDC)! tail ~~ T !n t * Qcomp/Qerr * 1 /RDC! AS 3 consequence CWQcomp « 1 /RDC- SO OW is the main limiter for the possible DC to AC light power ratio 'R DC '- When the difference between the channels 1 and 2 increases, the difference of the error 'Qsub,error' of both channels increases as well (see Figure 14). The orientation of this 'Qsub,error,diff is negative related to the differential integrated signal between the channels 'Qsig.diff: sign(Qsub,error,diff) = - sign(Qsig.diff). This means that with each DC subtraction a portion 'Qsub,error,diff is subtracted from the integrated signal 'Qsig.diff . When the 'Qsig.diff is low, it can be that the increasing absolute of 'Qsub,error,diff (increasing with integrated differential signal) reaches the absolute of 'Qsig.diff . Then a state is reached, where all newly integrated differential charge 'Qsig.diff is compensated by the subtraction error 'Qsub,error,diff. So the differential signal between both channels remains at this level independent from further integrations over time. One can consider this effect as a kind of saturation. The absolute maximum reachable differential signal 'absolute(Udiff12,sat)' is defined by 'absolute(Usense,sat - Usense,maximum)'. 'Usense, sat' is equal to the potential 'Usense' in Figure 14, where the absolute error 'Qerr' of 'Qsub' (related to the 'Qsub(Usense, maximum)' is equal to 'Qsub/RDC ('Qsub' is synonym for 'Qcomp').

[0041] Qerr originates from static dependencies like static current source output resistance, further from switching charge injection and finally from charging the parasitic capacitances of the common nodes.

[0042] The static effect occurs also with current sources in the time continuous implementation. To overcome the mismatch problem, the current sources need to be switched between the channels (chopper technique, Figure 6). Then the other two effects become relevant, too. The switching frequency needs to be high for high DC currents, to prevent the sense node from overflow due to current source mismatch. The evaluation of a formula yields a comparable charge packet of Q com p, cont =Q comP /MM, where MM is the relative current source mismatch. So the DC to AC light power ratio 'R D c' may be higher here by a factor of 1/MM— 10. On the other hand it needs more circuitry per channel, leading to larger layout area.

[0043] The minimum achievable 'CWQcomp' is about 0.01 in simulation within a 2V sense node signal swing at a 2OfF sense node capacitance, 3.3V supply voltage, with standard pmos devices in a 0.35um CMOS process. This value is only reached, if the current source output voltage is pre-charged to a copy of the sense node voltage before charging that sense node (Figure 16 to Figure 19) and if the switching pmos transistor is operated in saturation (This could make the result even worse in front of mismatch between switches). The result corresponds to R DC « 100. A further improvement would only be possible by reducing the sense node signal swing or by increasing the sense node capacitance or by replacing the pmos current source by a more ideal charge packet source.

[0044] Reducing the sense node signal swing could be possible by a capacitive feed back amplifier (Figure 20), which maintains the sense node to V f. One drawback is the required type of the feedback capacitance: It should be a poly- poly or an inter-metal capacitor if the output swings around the input. These types require more layout area than simple mos capacitors. The feedback capacitance could possibly also be a mos capacitor with use of charge readout. But than the output has to be kept below or above the input potential, depending on the mos type n or p. [0045] An idea for an ideal charge packet source can be derived from the ideas for the photo charge demodulators. They move very little charge packets - down to single electrons - with nearly no losses. Potentially possible ideal charge packet sources are:

a) pmos, but with oxide thickness increasing from drain to source => leading to a higher static and dynamic output impedance (forcing the channel charge to flow off to either drain or source, when mosfet is switched off, further increasing the drift field to make the channel more independent from drain voltage)

b) like previous, but gradient through gate voltage gradient and constant oxide thickness

c) like previous, but gradient though majority carrier current

d) quasi-ccd-like structure but with special gates instead of different overlapping gates (which would be a CCD). Various embodiments for the special gates are possible:

d1 ) special gate is continuous with high-resistive regions

d2) special gate is continuous with inversely (n and p) doped regions d3) special gate consists of neighbored gate parts distincted by gaps e) quasi-ccd-like structure but with substrate contacts .

[0046] Figure 21 to Figure 23 schematically represent quasi-ccd-like structures but with continuous high-resistive gates instead of different overlapping gates according to the above alternative d). The different parts and features shown in Figure 21 are:

150 n-well contact 157 high resistive gate

151 input node 158 p+ diffusion

152 gate contact for input control 159 n+ diffusion

153 middle gate contact 160 p+ diffusion

154 gate contact for control of one output 161 n-well

155 one output node 162 gate oxid

156 low resistive gate

[0047] Figure 22 shows a variant of the embodiment shown in Fig. 21 , wherein like elements are provided with the same reference signs and wherein 180 represents an n-gate and 181 represents a p-gate. A drawback of this implementation: potential flat under gate which results in a low field strength -> slow; 2nd drawback: to move out all charge completely, the output gate diode needs to be forward biased -> high current consumption.

[0048] A further implementation is shown in Fig. 23 with neighbored gates (190). drawback: potential flat under gate, low field strength -> slow; 2nd drawback: The charge needs to pass the ranges under the gate gaps. This happens slow or with losses. The problem can be minimized by lowering the gate gap, which goes into the direction to build a real CCD structure.

[0049] An embodiment of the charge packet source in accordance with the above mentioned alternative e), i.e. a quasi-ccd-like structure but with substrate contacts is represented in Figure 24. The different parts and features of this charge source are

150 n-well contact for input control 157 gate

151 input node 162 gate oxid

152 gate contact for input control 165 middle n-well contact

155 one n-well contact for one output 166 one output node

control

[0050] For options d) and e), possible methods of operation are the known Fill- Spill method for charge input to a CCD (represented schematically in Figure 25) or other techniques similar to CCD input methods. According to Fig. 25, the middle gate is first filled under 1 ) from the input node on the left side of the structure by lowering the potential on input control gate. The output gate for the respective channel is closed. In position 2) the middle gate is filled with a predefined charge quantity Q sub . In position 3), the output control gate is lowered and the entire Q sub is moved to the selected output node. By controlling the middle gate it is possible to accelerate the charge transfer as shown in position 4). Finally in position 5) the charge source returns to its idle state, where a new cycle may start.

[0051] Possible layout examples of the CCD structures for the above alternative d) are schematically represented in Figure 26 - Figure 28. Similar layouts are possible for the above alterative e). In Figure 26-28, the different zones are:

1 : Input node (e.g. 151 of figs 21-23)

2: Input Control (e.g. 152 of figs 21-23 or 150 of fig. 24)

3: channel under high resistance gate / range between zones 2 and 3 4: Middle control (e.g. 153 of figs 21-23 or 165 of fig. 24)

5: channel under high resistance gate / range between zones 4 and 6

6: Output control of the different channels (e.g. 154 of figs 21 -23 or 155 of fig. 24)

7: Output nodes of the different channels (e.g. 155 of figs 21 -23 or 166 of fig. 24)

[0052] By suitably adjusting the voltages at the different control gates, the shown charge sources can be controlled to supply the predefined charge quantity to one of the associated sense nodes of the pixel. If for instance in the example shown in Fig. 28, the control voltages on the nodes 1 , 2, 6a, 6d and 4B are set to an exemplary voltage of 3V, control node 4C is set to 3V or is left free and if the voltages of the nodes 6c and 4A are set to a voltage substantially smaller than the 3V of the other gates, for instance to 1V, then the input node 1 and the output nodes 7a, 7b and 7d are closed and the charge is emptied via channel 7c to the associated sense node of the pixel.

[0053] It will be appreciated that while the shown layouts are configured for 4 sense nodes, these layouts can also easily be adapted to shapes for servicing only 2 or 3 sense nodes.

ABBREVIATIONS, DEFINITIONES, GLOSSARY

MCT Minimum Charge Transfer

DC Direct current; In this context it is used for the light or signal components, which contribute only to the average of the raw demodulated signal.

AC Alternating current; In this context it is used for the active modulated light or its different signal representations in the system.

SNR Signal-to-Noise Ratio

2d two dimensional

CCD charge coupled device, requires special CCD technology

CMOS complementary MOS (technology)

SDM sigma-delta modulator

ROI range of interest