TECHNICAL FIELD

The present invention discloses an improved trans-conductance mixer.

BACKGROUND

Mixer circuits are common components in many fields of electronics, for example in such fields as TV, radio and radar. By means of a mixer circuit, two input signals are used in order to obtain an output signal which is a product of the two input signals. A mixer circuit can either be used for so called up-conversion, where a signal at an Intermediate Frequency, an IF signal, is shifted to Radio Frequency, RF, with the aid of a Local Oscillator signal, an LO signal, or the mixer can be used for down-conversion, where the RF signal is shifted to IF with the aid of an LO signal.

Important performance parameters for mixer circuits include linearity, conversion gain and power consumption. Fig 1 shows an example of a prior-art up-conversion mixer, a so called transconductance mixer 100 which in essence comprises a bipolar junction transistor where the IF signal is input to the transistor's base via a low pass filter ("LPF") and the LO signal is input to the transistor's base via a capacitor. The resulting RF signal is accessed at the transistor's collector via a capacitor.

A known transconductance mixer, such as the one of fig 1 , exhibits good linearity, although this characteristic can still be improved upon, in particular since the transconductance mixer of fig 1 needs a high level of LO power in order to obtain good linearity. Another operational parameter of a known transconductance mixer such as the one of fig 1 , the conversion gain, suffers from a decrease as the power level of the IF signal increases.

SUMMARY

It is an object of the present invention to address some of the drawbacks described above of a transconductance mixer. This object is met by means of a transconductance mixer which comprises a first and a second bipolar junction transistor which are connected to each other.

The transconductance mixer comprises a first and a second input port for first and second input signals, respectively. The transconductance mixer also comprises an output port for an output signal.

The transconductance mixer is arranged to output at the output port a third signal which is a product of the first and second input signals. In the transconductance mixer, the collectors of the first and second transistors are connected to each other and to the output port, and the emitter of the second transistor and the base of the first transistor are connected to each other and to the first and second input ports. In embodiments of the transconductance mixer, the first input port is connected to the emitter of the second transistor and the base of the first transistor via a low-pass filter, and the second input port is connected to the emitter of the second transistor and the base of the first transistor via a capacitor. In embodiments of the transconductance mixer, the first and second input ports are connected to the emitter of the second transistor and the base of the first transistor via a power combiner. In embodiments of the transconductance mixer, the emitter of the first transistor is grounded.

In embodiments of the transconductance mixer, the emitter of the first transistor and the base of the second transistor are arranged to be used as a third input port.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described in more detail in the following, with reference to the appended drawings, in which

Fig 1 shows a prior art trans-conductance mixer, and

Figs 2 and 3 show performance charts for the trans-conductance mixer of fig

1 , and

Fig 4 shows a first embodiment of a trans-conductance mixer, and

Figs 5-8 show performance diagrams of the trans-conductance mixer of fig 4, and

Fig 9 shows a second embodiment of a trans-conductance mixer, and

Fig 10 shows a third embodiment of a trans-conductance mixer, and

Fig 1 1 shows a fourth embodiment of a trans-conductance mixer.

DETAILED DESCRIPTION

Embodiments of the present invention will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. The invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Like numbers in the drawings refer to like elements throughout.

Fig 1 shows an example of a prior art transconductance mixer 100 which has been described briefly previously in this text. The transconductance mixer 100 comprises a bipolar junction transistor 108 as its primary mixing component. The two signals which are to be mixed are input to the transistor's base, so that, if, for example, the transconductance mixer is used for up-conversion, the IF signal is provided to the transistor's base, suitably via a low pass filter, LPF, and the LO signal is also provided to the transistor's base, suitably via a capacitor. The output signal, in the case of up-conversion the RF signal, is accessed at the transistor's collector, suitably via a capacitor. The emitter of the transistor is suitably grounded. In fig 1 , the transistor's control voltages V _c (collector) and V _b (base) are also shown, and are applied via respective resistors R _b and R _c .

Fig 2 shows the conversion gain vs. input power, P _in , for the transconductance mixer 100 of fig 1. As can be seen, the conversion gain drops sharply with increasing input power for such a transconductance mixer. In the example used in order to obtain the plot of fig 2, the IF frequency used was 1 GHz, the LO frequency was 75 GHz, the RF frequency was 76 GHz, the LO power level was 6 dBm and the DC power consumption of the transconductance mixer 100 was 20 mW. Fig 3 shows the linearity of the transconductance mixer 100 of fig 1 : a parameter which is often used in order to illustrate linearity is the output referred 1 dB compression point, the so called OP-idB- Fig 3 shows the OP-idB of the transconductance mixer 100 of fig 1 as a function of LO power level. We see that the OP-idB reaches a maximum value of -2.8 dBm for the LO power level used in fig 2, i.e. 6 dBm. Fig 4 shows a first embodiment 400 of a transconductance mixer of the invention. In the transconductance mixer, there is comprised a first 408 and a second 412 transistor, in this embodiment bipolar junction transistors, which are connected to each other in the following manner: the collector of the second transistor 412 is connected to the collector of the first transistor 408, and the emitter of the second transistor 412 is connected to the base of the first transistor 408. In addition, the connection between the emitter of the second transistor 412 and the base of the first transistor 408 is suitably grounded, preferably via a resistor R _e . The embodiment 400 also comprises a first 405 and a second 410 input port, both of which are connected to the connection between the emitter of the second transistor 412 and the base of the first transistor 408. In the embodiment 400, the connection between the collector of the second transistor 412 and the collector of the first transistor 408 serves as an output port 415, suitably via a capacitor 4001 . At the output port 415, a signal is produced which is a product of the signals from the first and second input ports.

In the embodiment 400, the transconductance mixer, by way of example, is shown as being used as an up-conversion mixer. Naturally, the transconductance mixer 400 of fig 4, which is also the case for the transconductance mixer of the invention in general, can also be used as a down-conversion mixer, or in general, for mixing two input signals at two frequencies, where, in the case of two input signals at the same frequency, the mixer will become a multiplier or a phase detector) and obtaining an output signal whose frequency is a sum or difference of the two input frequencies. In general, the two input signals are applied at the first 405 and second 410 input ports described above, and the output signal is accessed at the output port 415 described above, i.e. the collector of the first transistor 408 and the collector of the second transistor 412. In the up-conversion example of fig 4, the IF signal is input at the first input port 405 via a low pass filter, LPF, 407, and the LO signal is input at the second input port 410 via a capacitor 409. In the embodiment 400 of fig 4, the output signal is accessed at the output port 415 via a capacitor 401 , and the connection between the collectors of the first and second transistors is used for applying a control voltage V _c via a resistor 402. In addition, as shown in fig 4, the emitters of the two transistors 408, 412, are suitably grounded, in the case of the second transistor 412 preferably via a resistor 403.

Fig 5 shows the conversion gain of the embodiment 400, which can thus be contrasted with the conversion gain of the previously known mixer 100, as shown in fig 2. The frequencies used in the graph of fig 5 are the same as those for fig 2, but the LO power level is 4dBm, i.e. 2 dBm lower than that of fig 2. Still, as seen in fig 5, the maximum level of the conversion gain is almost the same as that in fig 2, but starts to decrease later than in fig 2 as the input power increases. Thus, we here see an improvement over the linearity of the prior art transconductance mixer 100, although the LO power level used is lower here.

Fig 6 shows the linearity of the embodiment 400, illustrated by the output referred 1 dB compression point, OP-idB, as a function of the LO power level. In fig 6, we see that the OP-idB of the embodiment 400 peaks at an LO power level of 4 dBm, which can be contrasted with fig 3, which shows that the OP-idB peaks at 6 dBm for the conventional transconductance mixer 100 of fig 1. The maximum OP-idB in fig. 6 is approximately 2.5 dBm, which is 5.3 dBm larger than the maximum OP-idB of fig 3. Thus, the embodiment 400 exhibits better linearity performance than the conventional transconductance mixer 100 and with a lower LO power consumption. In addition, the embodiment 400 has an improved LO-to-RF isolation than the conventional mixer 100. This is illustrated by fig 7, which shows the LO- to-RF isolation as a function of LO frequency for the embodiment 100 (thick line) and the embodiment 400 (thin line). The improved LO-to-RF isolation of the embodiment 400 is due to the fact that in the embodiment 400, the LO signal is input at the base of the transistor 408 as well as at the emitter of the transistor 412, so that the LO signal will be amplified by both transistors 408 and 412, but the signals which are obtained at the collectors of transistors 408 and 412 have a phase different of approximately 180° degrees, which causes the LO signal at the output port to be canceled to a certain extent, a phenomenon which does not occur for the conventional mixer 100, which is a single transistor device. Turning now to an explanation of why the transconductance mixer 400 offers improved conversion gain as compared to the transconductance mixer 100 of fig 1 , this can be explained by the following:

In a transconductance mixer such as the one 100 of fig 1 , the conversion gain drops with increasing input power, as was shown in fig 2. This is due to the fact that an increased input power gives rise to a drop in the base-emitter voltage, V _be , of the transistor 108.

As opposed to this, in the embodiment 400, the first transistor 408's V _be increases with increased input power, as illustrated by fig 8, which illustrates the effect of increased input power on V _be on the transistor 108 of the transconductance mixer 100 (dashed lines) and the transistors 408 (thick line) and 412 (thin line) of the embodiment 400. As can be seen, for the transistor 408, V _be increases with increased input power, as opposed to the decrease of V _be in the transistor 108. This is due to the fact that transistor 408's base is connected to the emitter of the transistor 412, and from there to ground via a resistor R _e . As the input power increases, the transistor 412 acts as a rectifier and delivers an increased DC current into the resistor R _e , thereby boosting the DC voltage at the base of transistor 408 and thereby also the V _be of transistor 408. The improved conversion gain shown in fig 5 is at least partly explained by the fact that that the gain expansion of transistor 408 "compensates" the gain compression of transistor 412.

Fig 9 shows another embodiment 900 in which the transconductance mixer, by way of example, is arranged to be used as a down-conversion mixer, i.e. an RF and an LO signal are multiplied to produce an output signal at an IF frequency. Like numbers from fig 4 denote like components. In the embodiment 900, the two input signals (in this example, the RF and LO signals) are added by means of a power combiner 920, with one input signal being input at one of the power combiner's input ports 905 (the phrase "input ports of the combiner" here refers to the ports at the combiner's 920 "combining side"), and the other input signal at the other input port 910, with the sum of the input signals being accessed at the power combiner's output port, and connected via a capacitor 925 to the connection between the emitter of the second transistor 412 and the base of the first transistor 408. The characteristics of the embodiment 900 are essentially the same as those of the embodiment 400.

If there is a desire to improve upon the LO-to-RF isolation of the embodiments 400, a so called balanced mixer topology can be used. A circuit diagram of a balanced mixer 10 based on the embodiment 400 is shown in fig 10: as can be seen in fig 10, the embodiment 10 essentially comprises two trans-conductance mixers such as the one 400 shown in fig 4. These two trans-conductance mixers ("sub-mixers") of the embodiment 10 are shown in fig 10 as 400' and 400", respectively, with their components numbered as those in fig 4, but with ' and ", respectively. Thus, for example, the first transistors of the two trans-conductance mixers 400' and 400" are numbered as 408' and 408". With renewed reference to the embodiment 400 of fig 4, the trans-conductance mixer 400 has a connection between the collectors of the first and second transistors: the two sub-mixers 400' and 400 " also exhibit this connection, and are, in addition, connected to each other at this connection. The output signal of the embodiment 10 is accessed from this connection, through a capacitor 401 '. In addition, the control voltage V _c , which was also shown in fig 4, is applied to this connection through a resistor 402'.

In the example of fig 10, the trans-conductance mixer 10 is shown as being an up-conversion mixer, and since the mixer 10 has a balanced topology, two LO signals, LO+ and LO -, shifted 180 degrees in phase relative to each other, are applied, as are two 180 degrees shifted IF signals, IF + and IF -.

The "plus signals", IF+ and LO+, are applied at one of the "sub mixers", in this case the sub-mixer 400', and the "minus signals", IF- and LO-, are applied at the other "sub mixer", in this case the sub-mixer 400". As with the embodiment 400 in fig 4, the IF signals are input to the connection between the second transistor's emitter and the first transistor's base, through a low pass filter, LPF, 407', 407", and the LO signals are input to the connection between the second transistor's emitter and the first transistor's base, through a capacitor 409', 409". The output signal of the embodiment 10 is, as explained above, accessed at the connection between the two sub- mixers.

If there is a desire to drive the two transistors 408 and 412 of the embodiment 400 with differential LO signals (i.e. LO+/LO-, 180 degrees shifted relative to each other) without using the balanced mixer of fig 10, an alternative embodiment 1 1 is shown in fig 1 1 : again, like numbers refer to like components from fig 4.

In the embodiment 1 1 , a balun 1 1 1 is used, with its "unbalanced" end being used as the input port for an LO signal, and the balanced ends being used to access two differential LO signals, LO+ and LO-. One of these LO signals, shown in fig 1 1 as LO+, is applied to the emitter of the second transistor 412 and the base of the first transistor 408 through a capacitor 409, and the other LO signal, i.e. LO-, is applied to the base of the second transistor 412, suitably via a capacitor 1 12, and to the emitter of the first transistor 408, which can be seen as using the base of the second transistor 412 and the emitter of the first transistor 408 as a third input port. The DC bias voltage V _b for the base of the second transistor 412 is suitably applied via a resistor 1 13.

The design of the trans-conductance mixer 1 1 makes it possible to use a lower LO power level, e.g. 2dBm.

The terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the invention. It should also be pointed out that FET transistors can be substituted for the bipolar junction transistors, with connections as follows:

Bipolar junction transistors FET transistors

Collector Drain

Emitter Source

Base Gate The invention is not limited to the examples of embodiments described above and shown in the drawings, but may be freely varied within the scope of the appended claims.