Title:
INTEGRATED CIRCUIT AND METHOD FOR MEMORY ACCESS CONTROL
Document Type and Number:
WIPO Patent Application WO2005088468
Kind Code:
A3
Abstract:
An integrated circuit comprising at least one processing module (PROC) for processing an application (APL) requiring specific communication parameter, at least one dynamic random access memory means (MM) for storing data, wherein the memory means (MM) is operable by a plurality of predefined operating modes, is provided. Additionally, at least one memory access selection means (SM) for selecting one of said plurality of predefined operating modes based on said communication parameters and at least one memory controller (MC) for controlling the access of said at least one dynamic random access memory means (MM) according to said predefined operating modes selected by said memory access selecting means (SM) is provided. Each of said memory controller (MC) are associated to one of the dynamic random access means (MM). An interconnect means (IM) couples the processing modules (PROC) and the memory controller (MC), such that the communication over the interconnect means (IM) is achieved.
Inventors:
BURCHARD ARTUR T (NL)
HARMSZE FRANCOISE J (NL)
HARMSZE FRANCOISE J (NL)
Application Number:
PCT/IB2005/050816
Publication Date:
May 11, 2006
Filing Date:
March 04, 2005
Export Citation:
Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
BURCHARD ARTUR T (NL)
HARMSZE FRANCOISE J (NL)
BURCHARD ARTUR T (NL)
HARMSZE FRANCOISE J (NL)
International Classes:
G06F13/14; G06F13/16
Domestic Patent References:
| WO2003067445A1 | 2003-08-14 |
Foreign References:
| US6092165A | 2000-07-18 | |||
| US6662285B1 | 2003-12-09 | |||
| US6205516B1 | 2001-03-20 | |||
| US20020056063A1 | 2002-05-09 |
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