COPYRIGHT

[0001] A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.

FIELD OF THE INVENTION

[0002] The present invention relates to circuits for use in displays, and, more specifically, to compensation for multiple degradation phenomena.

BACKGROUND OF THE INVENTION

[0003] As discussed in previous documents and patents, IGNIS Maxlife™ can compensate for both OLED and backplane issues including aging, non-uniformity, temperature, and so on.

SUMMARY OF THE INVENTION

[0004] Instead of using discrete steps for each compensation stage, an integrated compensation results in a more efficient implementation. Accordingly, an aspect of the present disclosure is directed to a method for compensating for a plurality of degradation phenomena adversely affecting luminance performance of current-driven pixel circuits in an active matrix display. Each of the pixel circuits includes a light emitting device driven by a driving transistor. The method includes storing, using one or more controllers, in a first table a plurality of first factors to compensate for a first phenomenon of the degradation phenomena, and in a second table a plurality of second factors to compensate a second phenomenon of the degradation phenomena. The method further includes measuring, using at least one of the controllers, a characteristic of a selected one of the pixel circuits affected by a detected one of the first phenomenon and the second phenomenon, and, responsive to the measuring, determining, using at least one of the controllers, a new value for a corresponding first factor and second factor for the detected phenomenon to produce a first adjusted value. The method further includes, responsive to determining the new value, automatically calculating, using at least one of the controllers, the other one of the first factor and the second factor to produce a second adjusted value, and storing, using at least one of the controllers, the first adjusted value and the second adjusted value in corresponding ones of the first table and the second table. The method further includes, responsive to the storing the first adjusted value and the second adjusted value, subsequently driving, using at least one of the controllers, the selected pixel circuit according to a pixel circuit characteristic that is based on the first adjusted value and the second adjusted value. These foregoing acts can be carried out in any order and can compensate for any combination of one or more phenomena.

[0005] According to another aspect of the present disclosure, a method is directed to compensating for a plurality of degradation phenomena adversely affecting luminance performance of current-driven pixel circuits in an active matrix display. Each of the pixel circuits includes a light emitting device driven by a driving transistor. The method includes storing, using one or more controllers, in a power factor table a plurality of power factors to compensate for a non-uniformity phenomenon of the degradation phenomena at each of the pixel circuits, the non-uniformity phenomenon relating to process non-uniformities in fabrication of the active matrix display. The method further includes storing, using at least one of the controllers, in a scaling factor table a plurality of scaling factors to compensate for at least a time-dependent aging phenomenon of the degradation phenomena of one or more of each of the light emitting device or the driving transistor of the pixel circuits. The method further includes storing, using at least one of the controllers, in an offset factor table a plurality of offset factors to compensate for at least a dynamic effect phenomenon of the degradation phenomena caused by at least a shift in a threshold voltage of the driving transistor of each of the pixel circuits. The method further includes measuring, using at least one of the controllers, a characteristic of a selected one of the pixel circuits affected by a detected one of the non- uniformity phenomenon, the aging phenomenon, or the dynamic effect phenomenon. The method further includes, responsive to the measuring, determining, using at least one of the controllers, a new value for a corresponding power factor, scaling factor, or offset factor for the detected phenomenon to produce a first adjusted value. The method further includes, responsive to determining the new value, automatically calculating, using at least one of the controllers, the other two of the power factor, the scaling factor, and the offset factor to produce a second adjusted value and a third adjusted value. The method further includes storing, using at least one of the controllers, the first, second, and third adjusted values in corresponding ones of the power factor table, the scaling factor table, and the offset factor table. The method further includes, responsive to the storing the first, second, and third adjusted values, subsequently driving, using at least one of the controllers, the selected pixel circuit according to a current that is based on the first, second, and third adjusted values. These foregoing acts can be carried out in any order and can compensate for any combination of one or more phenomena.

[0006] According to yet another aspect of the present disclosure, a display system is directed to compensating for degradation phenomena adversely affecting luminance performance. The system includes an active matrix with current-driven pixel circuits, each of the pixel circuit including a light emitting device driven by a driving transistor, a processor, and a memory device. The memory device has stored instructions that, when executed by the processor, cause the system to store in a first table a plurality of first factors to compensate for a first phenomenon of the degradation phenomena, and store in a second table a plurality of second factors to compensate a second phenomenon of the degradation phenomena. The stored instructions further cause the system, when executed by the processor, to measure a characteristic of a selected one of the pixel circuits affected by a detected one of the first phenomenon and the second phenomenon, and, responsive to the measuring, determine a new value for a corresponding first factor and second factor for the detected phenomenon to produce a first adjusted value. The stored instructions further cause the system, when executed by the processor and responsive to determining the new value, to automatically calculate the other one of the first factor and the second factor to produce a second adjusted value. The stored instructions further cause the system, when executed by the processor, to store the first adjusted value and the second adjusted value in corresponding ones of the first table and the second table, and, responsive to the storing the first adjusted value and the second adjusted value, subsequently drive the selected pixel circuit according to a pixel circuit characteristic that is based on the first adjusted value and the second adjusted value. These foregoing acts can be carried out in any order and can compensate for any combination of one or more phenomena.

[0007] Additional aspects of the present disclosure will be apparent to those of ordinary skill in the art in view of the detailed description of various embodiments, which is made with reference to the drawings, a brief description of which is provided below. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIG. 1 illustrates an exemplary configuration of a system for monitoring a degradation in a pixel and providing compensation therefore.

[0009] FIG. 2 is a flow diagram of an integrated compensation datapath according to an aspect of the present disclosure.

[0010] FIG. 3 illustrates a non-linear gamma curve for increasing the resolution at low gray levels.

[0011] FIG. 4 illustrates a compressed-linear gamma curve using a bit allocation.

[0012] While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all

modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

DETAILED DESCRIPTION

[0013] FIG. 1 is a diagram of an exemplary display system 50. The display system 50 includes an address driver 8, a data driver 4, a controller 2, a memory storage 6, and display panel 20. The display panel 20 includes an array of pixels 10 arranged in rows and columns. Each of the pixels 10 is individually programmable to emit light with individually programmable luminance values. The controller 2 receives digital data indicative of information to be displayed on the display panel 20. The controller 2 sends signals 32 to the data driver 4 and scheduling signals 34 to the address driver 8 to drive the pixels 10 in the display panel 20 to display the information indicated. The plurality of pixels 10 associated with the display panel 20 thus comprise a display array ("display screen") adapted to dynamically display information according to the input digital data received by the controller 2. The display screen can display, for example, video information from a stream of video data received by the controller 2. The supply voltage 14 can provide a fixed voltage or can be an adjustable voltage supply that is controlled by signals from the controller 2. The display system 50 can also incorporate features from a current source or sink (not shown) to provide biasing currents to the pixels 10 in the display panel 20 to thereby decrease programming time for the pixels 10. [0014] For illustrative purposes, the display system 50 in FIG. 1 is illustrated with only four pixels 10 in the display panel 20. It is understood that the display system 50 can be implemented with a display screen that includes an array of similar pixels, such as the pixels 10, and that the display screen is not limited to a particular number of rows and columns of pixels. For example, the display system 50 can be implemented with a display screen with a number of rows and columns of pixels commonly available in displays for mobile devices, televisions, digital cameras, or other monitor-based devices, and/or projection-devices.

[0015] The pixel 10 is operated by a driving circuit ("pixel circuit") that generally includes a driving transistor and a light emitting device. Hereinafter the pixel 10 may refer to the pixel circuit. The light emitting device can optionally be an organic light emitting diode, but implementations of the present disclosure apply to pixel circuits having other electroluminescence devices, including current-driven light emitting devices. The driving transistor in the pixel 10 can optionally be an n-type or p-type amorphous or poly-silicon thin- film transistor, but implementations of the present disclosure are not limited to pixel circuits having a particular polarity of transistor or only to pixel circuits having thin-film transistors. The pixel circuit 10 can also include a storage capacitor for storing programming information and allowing the pixel circuit 10 to drive the light emitting device after being addressed. Thus, the display panel 20 can be an active matrix display array.

[0016] As illustrated in FIG. 1, the pixel 10 illustrated as the top-left pixel in the display panel 20 is coupled to a select line 24j, a supply line 26j, a data line 22i, and a monitor line 28i. In an implementation, the supply voltage 14 can also provide a second supply line to the pixel 10. For example, each pixel can be coupled to a first supply line charged with Vdd and a second supply line coupled with Vss, and the pixel circuits 10 can be situated between the first and second supply lines to facilitate driving current between the two supply lines during an emission phase of the pixel circuit. The top-left pixel 10 in the display panel 20 can correspond to a pixel in the display panel in a "jth" row and "ith" column of the display panel 20. Similarly, the top-right pixel 10 in the display panel 20 represents a "jth" row and "mth" column; the bottom-left pixel 10 represents an "nth" row and "ith" column; and the bottom- right pixel 10 represents an "nth" row and "ith" column. Each of the pixels 10 is coupled to appropriate select lines (e.g., the select lines 24j and 24n), supply lines (e.g., the supply lines 26j and 26n), data lines (e.g., the data lines 22i and 22m), and monitor lines (e.g., the monitor lines 28i and 28m). It is noted that aspects of the present disclosure apply to pixels having additional connections, such as connections to additional select lines, and to pixels having fewer connections, such as pixels lacking a connection to a monitoring line.

[0017] With reference to the top-left pixel 10 shown in the display panel 20, the select line 24j is provided by the address driver 8, and can be utilized to enable, for example, a programming operation of the pixel 10 by activating a switch or transistor to allow the data line 22i to program the pixel 10. The data line 22i conveys programming information from the data driver 4 to the pixel 10. For example, the data line 22i can be utilized to apply a programming voltage or a programming current to the pixel 10 in order to program the pixel 10 to emit a desired amount of luminance. The programming voltage (or programming current) supplied by the data driver 4 via the data line 22i is a voltage (or current) appropriate to cause the pixel 10 to emit light with a desired amount of luminance according to the digital data received by the controller 2. The programming voltage (or programming current) can be applied to the pixel 10 during a programming operation of the pixel 10 so as to charge a storage device within the pixel 10, such as a storage capacitor, thereby enabling the pixel 10 to emit light with the desired amount of luminance during an emission operation following the programming operation. For example, the storage device in the pixel 10 can be charged during a programming operation to apply a voltage to one or more of a gate or a source terminal of the driving transistor during the emission operation, thereby causing the driving transistor to convey the driving current through the light emitting device according to the voltage stored on the storage device.

[0018] Generally, in the pixel 10, the driving current that is conveyed through the light emitting device by the driving transistor during the emission operation of the pixel 10 is a current that is supplied by the first supply line 26j and is drained to a second supply line (not shown). The first supply line 22j and the second supply line are coupled to the voltage supply 14. The first supply line 26j can provide a positive supply voltage (e.g., the voltage commonly referred to in circuit design as "Vdd") and the second supply line can provide a negative supply voltage (e.g., the voltage commonly referred to in circuit design as "Vss"). Implementations of the present disclosure can be realized where one or the other of the supply lines (e.g., the supply line 26j) are fixed at a ground voltage or at another reference voltage.

[0019] The display system 50 also includes a monitoring system 12 that receives monitored or measured or extracted information about individual pixels a via a respective monitor line 28. With reference again to the top left pixel 10 in the display panel 20, the monitor line 28i connects the pixel 10 to the monitoring system 12. The monitoring system 12 can be integrated with the data driver 4, or can be a separate stand-alone system. In particular, the monitoring system 12 can optionally be implemented by monitoring the current and/or voltage of the data line 22i during a monitoring operation of the pixel 10, and the monitor line 28i can be entirely omitted. Additionally, the display system 50 can be implemented without the monitoring system 12 or the monitor line 28i. The monitor line 28i allows the monitoring system 12 to measure a current or voltage associated with the pixel 10 and thereby extract information indicative of a degradation of the pixel 10. For example, the monitoring system 12 can extract, via the monitor line 28i, a current flowing through the driving transistor within the pixel 10 and thereby determine, based on the measured current and based on the voltages applied to the driving transistor during the measurement, a threshold voltage of the driving transistor or a shift thereof.

[0020] The monitoring system 12 can also extract an operating voltage of the light emitting device (e.g., a voltage drop across the light emitting device while the light emitting device is operating to emit light). The monitoring system 12 can then communicate the signals 32 to the controller 2 and/or the memory 6 to allow the display system 50 to store the extracted degradation information in the memory 6. During subsequent programming and/or emission operations of the pixel 10, the degradation information is retrieved from the memory 6 by the controller 2 via the memory signals 36, and the controller 2 then compensates for the extracted degradation information in subsequent programming and/or emission operations of the pixel 10. For example, once the degradation information is extracted, the programming information conveyed to the pixel 10 via the data line 22i can be appropriately adjusted during a subsequent programming operation of the pixel 10 such that the pixel 10 emits light with a desired amount of luminance that is independent of the degradation of the pixel 10. In an example, an increase in the threshold voltage of the driving transistor within the pixel 10 can be compensated for by appropriately increasing the programming voltage applied to the pixel 10. The compensation is determined as described below and illustrated in reference to FIGs. 2-4.

Integrated Datapath

[0021] According to an aspect of the present disclosure, a method is directed to compensating for multiple degradation phenomena simultaneously, where the degradation phenomena adversely affect a luminance performance of current-driven pixels (e.g., pixels 10 of FIG. 1), in an active matrix display (e.g., display panel 20). Each of the pixel circuits includes a light emitting device (such as an organic light-emitting diode or OLED) driven by a driving transistor. Degradation phenomena include a non-uniformity phenomenon (caused by process non-uniformities), a temperature phenomenon, a hysteresis phenomenon, a time- depending aging phenomenon, and a dynamic effect phenomenon, which can be caused by a shift in a threshold voltage of a driving transistor of a pixel circuit. Sometimes, these phenomena can also be referred to as pixel "parameters" in the OLED art.

[0022] Using a generic compensation equation for the pixel current, one can identify the effect of each phenomenon (e.g., OLED and TFT aging, non-uniformity, and so on) on each parameter. As a result, when a phenomenon is being measured, all the parameters being affected by this phenomenon are updated.

[0023] One example of this implementation is based on

Ip(ij) = k'(i,j).(V _g (i,j)-V _T (i,j)) ^a ' ^(lj)

(1)

[0024] Ip is the pixel current drawn by a given row and column (i,j) of the active matrix display. V _T (i,j) = VTo(ij)-AV _T o(ij)-KdynVoLED(ij) and k'(ij) = k _comp (i,j).p(i,j). Here, Vxo(ij) is an initial non-uniformity offset, AVxo(ij) is an aging offset, Κ , _η is a dynamic effect of VOLED on the offset, k _comp (i,j) is an effect of OLED efficiency degradation on the scaling factor, and P(i,j) is the effect of pixel non-uniformity on the scaling factor. For example, if the OLED efficiency degrades by 10%, the pixel current is increased by 10% to compensate for the loss of efficiency, which means K _comp will be 1.1. The letters i and j refer to the column and row, respectively, of the pixel being measured.

[0025] Calculating V _g (i,j) from (1) gives

Vg(i,j) = k(i,j)Ip(i,j) ^a(lj) +V _T (i,j)

(2)

In Equation (2), k(i,j) = (1/ k'(i,j))l/a'(i,j), a(i,j) = l/a'(i,j).

[0026] In FIG. 2, the Power LUT 106 (lookup table) refers to a power factor table, which stores power factors to compensate for a non-uniformity phenomenon 100 relating to process non-uniformities in the fabrication of the active matrix display. The Scaling LUT 108 refers to a scaling factor table that stores multiple scaling factors to compensate for a time-dependent aging phenomenon 102 of the light emitting device and/or the driving transistor of a pixel circuit of the active matrix display. The Offset LUT 110 refers to an offset factor table that stores multiple offset factors to compensate for a dynamic effect phenomenon 104 caused at least by a shift in the threshold voltage, VT, of the driving transistor of a pixel circuit of the active matrix display. The measurement of a current and/or voltage, for example, is illustrated in blocks 112, 114, 116. In FIG. 2, the asterisk (*) refers to a representation of the measured/extracted signal (e.g., voltage, current, or charge) from one of the monitor lines 28 that has been affected by one or more phenomena described herein.

[0027] A characteristic of a selected one of the pixel circuits that is affected by one or more of the degradation phenomena is measured. This characteristic can be, for example, a current consumed by the driving transistor or a voltage across the driving transistor, a current consumed by the light emitting device or a voltage across the light emitting device, a threshold voltage of the driving transistor. Some degradation monitoring schemes are disclosed in U.S. Patent Application Publication No. 2012/0299978, and in U.S. Patent Application Publication 2012/0299973.

[0028] Using the equations above, the measured characteristic is used to determine a new value to produce an adjusted value that produces a new power factor, scaling factor, and/or offset factor. Whichever factor is adjusted, the other two factors are adjusted automatically and simultaneously using the equations above. The adjusted factors are stored in the respective power, scaling, and offset factor tables. The compensated pixel is driven according to a current that is based on the adjusted values and a programming current or voltage.

[0029] Alternatively and/or optionally, the order of the measured phenomena in determining the new value can vary such that any order combination of the factors determined based on the Power LUT 106, the Scaling LUT 108, and the Offset LUT 110 is possible. By way of example, the new scaling factor based on the Scaling LUT 108 is determined first, the new power factor based on the Power LUT 106 second, and the new offset factor based on the Offset LUT 110 third. In another example, the new offset factor is determined first, the new power factor is determined second, and the new scaling factor is determined third.

[0030] According to another alternative and/or optional feature, the source of changing each parameter can include other parameters in addition or instead of those illustrated in FIG. 2. By way of example, any one or more sources of non-uniformity, temperature, hysteresis, OLED aging, and dynamic effect, can be included in determining any of the factors determined in accordance with the Power LUT 106, the Scaling LUT 108, and/or the Offset LUT 110. For example, in addition to or instead of the non-uniformity phenomenon, one or more of the temperature, hysteresis, OLED aging, and dynamic effect phenomena are used to determine the new power factor for the Power LUT 106.

[0031] According to yet another alternative and/or optional feature, each parameter stage is divided in multiple stages. For example, the stage for determining the new scaling factor for the Scaling LUT 106 includes two or more sub-stages having multiple new scaling factors. Accordingly, by way of a specific example, a first scaling sub-stage determines a first new scaling factor based on non-uniformity, a second scaling sub-stage determines a second new scaling factor based on temperature, a third scaling sub-stage determines a third new scaling factor based on hysteresis, etc. Alternatively, referring to the above specific example, the new scaling factors are determined in order. For example, the third new scaling factor based on hysteresis is determined first, and the first new scaling factor based on non-uniformity is determined second.

[0032] According to yet another alternative and/or optional features, additional stages are included in addition to or instead of the stages illustrated in FIG. 2. For example, in addition to or instead of the stages for determining the new power, scaling, and offset factors, one or more stages are included for determining a brightness control factor, a contrast control factor, etc. Gamma Adjustment

[0033] Both for measurement and compensation, a higher resolution is desired at low gray scales. While using a non-linear gamma curve is traditional in driving liquid crystal display (LCD) panels, it is not normally needed for OLED due to the non-linear pixel behavior. As a result, OLED displays provide a unique opportunity to avoid non-linear gamma, which makes the system simpler. However, a non-linear gamma 120 is a contemplated method to increase the resolution at the low gray levels, as illustrated in FIG. 3.

[0034] In external compensation, greater headroom in the source drive voltage is needed by design. While at the beginning of the panel (i.e., active matrix display) aging, a smaller peak voltage is needed to obtain a target luminance, and as the panel ages the peak voltage needs to increase but at the same time the maximum voltage for target black increases due to the offset shift. [0035] Therefore, a compressed range of the source driver voltage is used that is smaller than the source driver voltage. This range can be shifted up or down depending on the panel status, as illustrated in FIG. 4 and described by way of example below.

[0036] Referring to FIG. 4, a compressed-linear gamma curve uses a bit allocation. The dashed line 130 represents the available range of the source driver from GND (ground) to the VDD (power supply) of the source driver (SDVDD). The bold line 132 represents the range set by configuring the reference voltages of the source driver such that a 10-bit scale applies to the range in bold. Optionally, the non-linear gamma 120 method of FIG. 3 and the compressed-linear gamma method of FIG. 4 are merged to provide a combination in which at least some of the bit allocation is in accordance with the non-linear gamma curve 120 and at least a portion is in accordance with the compressed-linear gamma curve 130, 132.

[0037] Some or all of the blocks shown in FIGs. 2-4, described by way of example herein, represent one or more algorithms that correspond to at least some instructions executed by one or more controllers to perform the functions or steps disclosed. Any of the methods or algorithms or functions described herein can include machine or computer-readable instructions for execution by: one or more processors or controllers, and/or any other suitable processing device. Any algorithm, software, or method disclosed herein can be embodied as a computer program product having one or more non-transitory tangible medium or media, such as, for example, a flash memory, a CD-ROM, a floppy disk, a hard drive, a digital versatile disk (DVD), or other memory devices (e.g., memory 6 of FIG. 1), but persons of ordinary skill in the art will readily appreciate that the entire algorithm and/or parts thereof can alternatively be executed by a device other than a controller and/or embodied in firmware or dedicated hardware (e.g., it can be implemented by an application specific integrated circuit (ASIC), a programmable logic device (PLD), a field programmable logic device (FPLD), discrete logic, etc.). By way of example, the methods, algorithms, and/or functions can include machine or computer-readable instructions for execution by the controller 2 and/or the monitoring system 12 illustrated and described above in reference to FIG. 1.

[0038] Each of these embodiments and obvious variations thereof is contemplated as falling within the spirit and scope of the claimed invention, which is set forth in the following claims. Moreover, the present concepts expressly include any and all combinations and subcombinations of the preceding elements and aspects.