FIELD OF THE INVENTION

The present invention relates generally to optical communications, and particularly to devices and methods for high-speed modulation of optical signals.

BACKGROUND

High-speed optical communications require modulation of light sources at very high frequencies. The fastest optical interconnects that have been implemented to date are capable of operating at 100 Gb/s per lane, and higher speeds are in the planning stages.

Plasmonic modulators have been proposed as a possible solution to the need for higher modulation speed. Modulators of this sort are based on the interaction between surface plasmon polaritons (SPPs) and externally applied electric fields. Surface plasmon polaritons are generated at the interface between a dielectric material and a metal, and can be directly excited by light beams. Application of a rapidly-varying electric field to the metal causes a corresponding modulation of the SPPs, which in turn translates into modulation of the light beam at the end of the plasmonic regime. The term“plasmonic modulator” is used in the present description and in the claims to refer to devices that apply an electric field to modulate surface plasmons polaritons, which are then converted back to light beams at the end of the plasmonic regime. The term“light” is used in this context to optical radiation in any of the visible, infrared and ultraviolet ranges.

Plasmonic modulators based on the above principles have been demonstrated experimentally and described in the patent literature, but they are still far from commercial deployment. For example, PCT International Publication WO 2011/162719 describes a metal- oxide-semiconductor plasmonic slot waveguide, which includes a silicon layer, a silicon oxide layer laterally disposed next to a first side wall of the silicon layer, a first metal layer laterally disposed next to the silicon oxide layer, and a second metal layer laterally disposed next to a second side wall of the silicon layer, wherein the second side wall is opposite to the first side wall. A plasmonic mode can propagate along the slot waveguide, and the propagating characteristics can be adjusted by the voltage applied on the metal layers. A metal-oxide- semiconductor plasmonic modulator includes first and second metal-oxide-semiconductor plasmonic slot waveguides of this sort. Embodiments of the present invention that are described hereinbelow provide improved devices and methods for high-speed modulation of light beams.

There is therefore provided, in accordance with an embodiment of the invention, an 5 optoelectronic device, including a semiconductor substrate and thin film structures disposed on the substrate and patterned to define components of an integrated drive circuit, which is configured to generate a drive signal. A back end of line (BEOL) stack of alternating metal layers and dielectric layers disposed over the thin film structures. The metal layers include a modulator layer, which contains a plasmonic waveguide and is patterned to define a plurality of 10 electrodes, which are configured to apply a modulation to surface plasmons polaritons (SPPs) propagating in the plasmonic waveguide in response to the drive signal applied to the electrodes. A plurality of interconnect layers are patterned to define electrical traces, which are connected by vias to the thin film structures on the substrate and to the electrodes in the modulator layer so as to interconnect the components of the integrated drive circuit and to apply the drive signal 15 generated thereby to the electrodes. An optical input coupler is configured to couple light into the modulator layer, whereby the light is modulated by the modulation of the SPPs. An optical output coupler is configured to couple the modulated light out of the modulator layer.

In one embodiment, the plasmonic waveguide is configured as a Mach-Zender interferometer, having first and second parallel legs, and the electrodes includes at least first and 20 second electrodes, which are configured to apply the modulation to the SPPs with different, respective phases to the first and second parallel legs.

In another embodiment, the electrodes are patterned to define a ring modulator.

In some embodiments, at least one of the optical couplers is disposed in a plane of the modulator layer. Alternatively or additionally, at least one of the optical couplers is formed on 25 the modulator layer and is configured to couple the light between the modulator layer and a propagation direction that is not parallel to a plane of the modulator layer.

In a disclosed embodiment, the modulator layer is a final, outer layer of the BEOL stack.

In some embodiments, the device includes an electro-optical layer disposed over the modulator layer and within the plasmonic waveguide. Additionally or alternatively, a 30 transparent conductive oxide is disposed over the modulator layer and within the plasmonic waveguide.

2 There is also provided, in accordance with an embodiment of the invention, a method for fabrication of an optoelectronic device. The method includes forming and patterning thin film structures on a semiconductor substrate so as to define components of an integrated drive circuit, which is configured to generate a drive signal. A back end of line (BEOL) stack of alternating metal layers and dielectric layers is deposited and patterned over the thin film structures. The metal layers include a modulator layer, which contains a plasmonic waveguide and is patterned to define a plurality of electrodes, which are configured to apply a modulation to surface plasmon polaritons (SPPs) propagating in the plasmonic waveguide in response to the drive signal applied to the electrodes. A plurality of interconnect layers are patterned to define electrical traces, which are connected by vias to the thin film structures on the substrate and to the electrodes in the modulator layer so as to interconnect the components of the integrated drive circuit and to apply the drive signal generated thereby to the electrodes. Light is coupled into the modulator layer, whereby the light is modulated by the modulation of the SPPs, and the modulated light is coupled out of the modulator layer.

The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1A is a schematic top view of an integrated plasmonic modulation device, in accordance with an embodiment of the invention;

Fig. IB is a schematic pictorial view showing details of the device of Fig. 1 A;

Fig. 1C is a schematic side view of the device of Fig. 1A;

Fig. 2 is a schematic pictorial view of an integrated plasmonic modulation device, in accordance with another embodiment of the invention;

Fig. 3 is a schematic pictorial view of an integrated plasmonic modulation device, in accordance with yet another embodiment of the invention;

Fig. 4 is a schematic detail view of a plasmonic modulator, in accordance with still another embodiment of the invention;

Fig. 5 is a schematic detail view of a plasmonic modulator, in accordance with still another embodiment of the invention; and

Fig. 6 is an electrical schematic diagram of an integrated drive circuit for use in a plasmonic modulation device, in accordance with an embodiment of the invention. Plasmonic modulators are physically capable of modulating light at rates well in excess of 100 Gb/s. Furthermore, due to the increased light-matter interaction exhibited by surface plasmon polaritons (SPPs), plasmonic devices can apply deep modulation to an incident light beam over very short interaction lengths, while requiring only moderate excitation voltages. To realize these advantages in practical devices, however, it is also necessary to generate and apply the required high-speed electrical drive signals to the plasmonic modulator efficiently, over a link that is as short as possible, while minimizing parasitic capacitance and power loss.

Embodiments of the present invention that are described herein address this need by integrating a plasmonic modulator into the back end of line (BEOL) stack of the same integrated circuit (IC) device that generates the drive signal. As is well known in the art, IC fabrication starts with front end of line (FEOL) steps, in which thin film structures are deposited on a semiconductor substrate, such as a silicon wafer, and are patterned to define the components of the IC, such as transistors, diodes, capacitors and resistors. The BEOL stack is then formed by depositing alternating metal layers and dielectric layers over the thin film structures. The metal layers are patterned to define electrical traces, which are connected by vias to the thin film structures on the substrate so as to interconnect the components of the IC and thus create a functional device.

In the present embodiments, one of the BEOL layers serves as a modulator layer. An optical input coupler couples light into the modulator layer. This layer contains a plasmonic waveguide, with metal patterned to define electrodes in contact with the waveguide. The FEOL and the remaining, interconnect layers of the BEOL stack form a high-speed integrated drive circuit, which generates a drive signal for the modulator. Vias between the interconnect layers and the modulator layer supply this drive signal to the electrodes, which thus modulate the plasmons in the waveguide. This modulation is translated into optical modulation when the plasmons are converted back to light at the output of the plasmonic modulator. An optical output coupler couples the modulated light out of the modulator layer.

This use of a BEOL layer as an optical modulator differs from usual IC fabrication practices, in which the active components of the IC are in the FEOL layers, and the BEOL provides only passive interconnects. BEOL processes, however, are well suited to etching the electrical structures and plasmonic waveguide of the modulator and can be adapted to receive and transmit the light beam that is to be modulated, using optical coupling techniques that are in in the same IC chip that is provided by the present embodiments achieves high integration density, as well as very short interconnects, with low parasitic capacitance, between the drive circuit and the modulator. Modulators in accordance with the present embodiments are thus capable of ultra- high-speed modulation with high electrical efficiency and low heat dissipation.

Reference is now made to Figs. 1A-C, which schematically illustrate an integrated plasmonic modulation device 20, in accordance with an embodiment of the invention. Fig. 1 A is a top view, while Figs. IB and 1C are pictorial and side views, respectively, showing details of the internal structure of the device. The upper layer of device 20 comprises a plasmonic modulator 26, which receives an input beam of light via an input optical waveguide 22, and outputs a modulated beam to an output optical waveguide 24. Waveguides 22 and 24 may comprise optical fibers, for example. Alternatively, modulator 26 may receive and transmit beams of light through free space.

Modulator 26 in this embodiment has the form of a Mach-Zender interferometer, comprising a slot waveguide 36 for surface plasmon polaritons (SPPs) within a metal modulator layer 48. Waveguide 36 splits into two parallel legs at a Y-junction at one end of modulator 26, which then rejoin at another Y-junction at the other end. The slots of waveguide 36 are defined by a common central electrode 30 and excitation electrodes 32 and 34 on opposing sides of the modulator. In a typical implementation, the slots are about 100-200 nm deep, 75-100 nm wide, and 10-25 pm long; but these dimensions are presented solely by way of example, and larger or smaller dimensions may alternatively be used. Electrode 30 may be grounded, for example, while electrodes 32 and 34 are driven by signals with different respective phases, such as a drive signal S on electrode 32 and its inverse 5 on electrode 34. The drive signals are typically in the range of a few volts peak-to-peak, but larger or smaller voltages may alternatively be used depending on application requirements. An electro-optical layer 52 is deposited over modulator layer 48, as shown in Fig. 1C, and fills the slots of waveguide 36. Layer 52 may comprise any suitable sort of electro-optical material, for example a monolithic chromophore, such as DLD164, or a suitable ceramic, such as barium titanate (BaTi03).

Optical couplers 38, parallel to the plane of modulator layer 48, couple the light into and out of modulator 26. In the pictured example, couplers 38 comprise tapered dielectric waveguides, for example SiN waveguides, which are formed by deposition and etching in a dielectric layer 50 below modulator 26. Alternatively, couplers 38 may comprise other suitable optical materials, such as silicon, and may be formed in or over the plane of modulator 26. Couplers 38 in the present example taper adiabatically. so that light propagates into and out of waveguide 36 in a single mode, without substantial reflection or energy transfer into higher order-modes, thus exhibiting low optical loss. Alternatively, other suitable sorts of couplers may be used. Although modulator layer 48 is shown in Figs. 1A-C as being the top metal layer in device 20, the modulator layer may alternatively be an internal layer within the IC device.

As shown in Figs. IB and 1C, device 20 comprise FEOL layers 40, overlaid by a BEOL stack 42, which includes modulator layer 48. FEOL layers 40 typically comprise a semiconductor substrate 54, such as a silicon wafer substrate. Thin film structures 56 are formed on substrate 54 by processes of doping, thin film deposition, and etching, for example, with an overlying dielectric layer 58, comprising S1O2, for example. BEOL stack 42 comprises a lower metal layer 44, followed by alternating dielectric layers 50 and metal interconnect layers 46. Lower metal layer 44 and interconnect layers 46 are patterned to define electrical traces, which are interconnected by vias 62 through dielectric layers 50 and by vias 60 through dielectric layer 58 to thin film structures 56.

The patterned metal layers 44, 46 and vias 60, 62 thus interconnect the components of

FEOL layers 40 to create an integrated drive circuit, and may comprise associated logic circuits, as well. Any suitable IC technology that is known in the art may be used for this purpose. For example, the drive circuit may be implemented using standard complementary metal-oxide- semiconductor (CMOS) technology. Alternatively, for higher speed, the drive circuits may be implemented using BiCMOS technology, which combines CMOS transistors with bipolar junction transistors.

In any case, the drive signal generated by this drive circuit is applied between electrodes 30, 32 and 34 through vias 62, which connect modulator layer 48 to the next metal layer 46 down BEOL stack 42. (In an alternative embodiment, not shown in the figures, the modulator layer can be located at an intermediate level, as noted earlier, with interconnecting vias above and below.) Layer 48 may comprise any suitable metal, and not necessarily one of the metals normally used with the IC technology of the drive circuit.

Fig. 2 is a schematic pictorial view of an integrated plasmonic modulation device 70, in accordance with another embodiment of the invention. Device 70 is substantially similar to device 20, as described above, except that in device 70, an electro-optical layer 72 is deposited only over the part of the modulator layer where it is actually required, for example over the parallel legs of waveguide 36. This approach leaves the rest of the upper surface of device open for other features, such as optical couplers (not shown in this figure). Alternatively, the electro- optical material mav be deposited only within the slots of the waveguide, particularly when the modulator layer is not the outer layer of the BEOL stack.

Fig. 3 is a schematic pictorial view of an integrated plasmonic modulation device 80, in accordance with yet another embodiment of the invention. Device 80 also resembles device 20, with modulator 26 in the final, outer layer of BEOL stack 42. Instead of the in-plane optical coupling in device 20, however, device 80 comprises out-of-plane optical couplers 82, for example grating couplers, as are known in the art. Couplers 82 are formed on the modulator layer and couple light into and out of waveguide 36 from and to propagation directions that are not parallel to the plane of the modulator layer. The light may be transmitted to and from couplers 82 through free space or through waveguides, such as suitably positioned optical fibers.

Although device 80 is shown in Fig. 3 as comprising both input and output couplers 82 of this sort, in an alternative embodiment, the modulator device may comprise one in-plane coupler and one out-of-plane coupler.

Fig. 4 is a schematic detail view of a plasmonic ring modulator 90, in accordance with still another embodiment of the invention. Ring modulator 90 may be used in the sorts of plasmonic modulation devices described above in place of Mach-Zender modulator 26, mutatis mutandis. Alternatively, other plasmonic modulator configurations (not shown in the figures) that are suitable for integration in the BEOL stack may be used, as well.

In the example shown in Fig. 4, a dielectric waveguide 92, comprising SiN, for example, is deposited over or formed within a dielectric (typically S1O2) layer 94 in the BEOL stack. Alternatively, other types of waveguides may be used, such as a silicon waveguide. A disk electrode 96 and a surrounding ring electrode 98 are patterned in the overlying metal layer to define the ring modulator, with a circular slot waveguide 99 between the electrodes. The slot is typically about 100-200 nm deep, 75-100 nm wide, and 6 pm in diameter, and is filled with an electro-optical material, as in the preceding embodiment. (These dimensions are again presented solely by way of example, and larger or smaller dimensions may alternatively be used.) Electrical contacts 100 and 102, which are typically formed as part of the BEOL metallization, apply the drive signal between the electrodes, across waveguide 99, thus modulating the light passing through waveguide 92. Although contact 100 is shown in Fig. 4 as a bridge extending above ring electrode 98, this contact may alternatively be made from below disk electrode 96, within the BEOL stack.

Fig. 5 is a schematic detail view of a plasmonic slot modulator 103, in accordance with still another embodiment of the invention. Slot modulator 103 may be used in the sorts of nlasmonic modulation devices described above in place of Mach-Zender modulator 26. mutatis mutandis.

In the example shown in Fig. 5, a slot 105 is etched through a metal layer of the BEOL stack, thus defining electrodes 106 on one or both sides of the slot. The metal layer may comprise gold, for example, with a thickness (and thus slot depth) of 200 nm, which is deposited over a dielectric layer 107, such as SiCE. The width of the slot is typically in the range of 300 nm, for example. A thin dielectric layer 108, for example AI ₂ O ₃ , with a thickness of about 5 nm, is deposited over electrodes 106. A transparent conductive oxide (TCO) layer 104, such as indium tin oxide (ITO) is then deposited over and within slot 105.

Application of a voltage V to electrodes 106 causes charges 109 to accumulate in slot

105, thus changing the permittivity and hence the absorption of plasmons in in the TCO within the slot. Modulating the voltage results in a corresponding modulation of the absorption. Modulator 103 is thus capable of high-frequency plasmonic modulation by electro-absorption, without requiring the sort of interferometric structures used in the preceding embodiments.

Fig. 6 is an electrical schematic diagram of an integrated drive circuit 110 for use in a plasmonic modulation device, in accordance with an embodiment of the invention. A drive circuit of this sort can be implemented in FEOL layers 40 of the plasmonic modulation devices described above, with interconnects through BEOL stack 42. Drive circuit 110 is suitable for implementation using BiCMOS technology, in order to reach a drive bandwidth that fully exploits the available modulation bandwidth of plasmonic modulator 26.

Drive circuit 110 uses a power multiplexer (PMUX) approach, in which multiple low- speed tributaries are combined through a number of multiplexing stages to create a high-speed signal. In other words, drive circuit 110 receives several input data signals (four signals in the pictured example) via respective buffer amplifiers 112. A clock divider 116 splits an input clock at the desired drive frequency / into component clocks of frequency fll with phases 90° apart. Individual clock dividers 114 split these clock signals again into four input clocks with frequency //4 and different, respective phases for the four input data channels. Two multiplexers 118 each combine a pair of the input signals, and a multiplexer 120 combines these paired signals to generate the drive signal to modulator 26 at the drive clock rate f which is four times the input clock rate of each of the four data channels.

Alternatively, a smaller or larger number of data inputs and multiplexing stages can be used to generate drive signals at a smaller or larger multiple of the input clock rate. For example, the outputs of two 4:1 multiplexers with the topology shown in Fig. 6 may be into a single output.

The final multiplexer 120 directly drives plasmonic modulator 26, without requiring an additional buffer or driver amplifier. The signal modulation format in the embodiment shown in Fig. 6 is non-retum-to-zero (NRZ), but alternatively, the drive circuit can be adapted to other modulation schemes, such as four-level pulse amplitude modulation (PAM4).

In alternative embodiments, other sorts of drive circuits can be used to drive plasmonic modulators in accordance with the present embodiments, even if not at the maximal data rate supported by the modulator. For example, plasmonic modulator 26 can be integrated in the BEOL stack of a CMOS IC, such as a CMOS switching circuit. In this case the“drive circuit” of the modulator could simply be the SerDes (serializer/deserializer) at the output of the switching circuit.

In any of the above embodiments, because of the small dimensions of the plasmonic modulator, the modulator is seen by the drive circuits as a small, lumped capacitive load, typically on the order of a few femtofarads. Because the modulator is so closely coupled to the FEOL layers of the IC, there is little or no parasitic capacitive or inductive loss in the circuit, and no need for 50 ohm termination. Thus, the plasmonic modulator can fully exploit the available data rate and driving power of the drive circuit, regardless of the IC technology - whether high speed BiCMOS as in Fig. 5, CMOS, or any other suitable IC type.

It will be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art.