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Title:
INTEGRATION CIRCUIT AND SETTING METHOD THEREOF
Document Type and Number:
WIPO Patent Application WO/2005/026975
Kind Code:
A1
Abstract:
An integrated circuit includes a plurality of processor cores executing a program, out of which a predetermined number of processor cores operating normally are set as processor cores that can be actually used. The integrated circuit presents redundant structure appropriate for a symmetric multi-processor core and means for setting a processor core that can be actually used and improves the yield. When setting a processor core that can be used actually, a request for accessing a cache memory of a processor core other than the actually usable processor core and to be invalidated is cut off, so that the access request is not received by the cache memory.

Inventors:
ANDO HISASHIGE (JP)
Application Number:
PCT/JP2003/011728
Publication Date:
March 24, 2005
Filing Date:
September 12, 2003
Export Citation:
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Assignee:
FUJITSU LTD (JP)
ANDO HISASHIGE (JP)
International Classes:
G06F13/16; G06F15/16; (IPC1-7): G06F15/16
Foreign References:
JP2002197072A2002-07-12
JPH11328133A1999-11-30
JPH04199285A1992-07-20
JP2000259413A2000-09-22
JPH08148573A1996-06-07
Attorney, Agent or Firm:
Yamada, Masaki (Pelican Building 4th Floor 3-3, Nishi-shimbashi 3-chom, Minato-ku Tokyo, JP)
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