LAMINATED CERAMIC CAPACITOR

WIPO Patent Application WO/2012/114877

A1

Provided is a laminated ceramic capacitor that can suppress degradation of insulation resistance resulting from adding vanadium. Second insulating layers (20, 22) are laminated to both sides in the direction of lamination of a first insulating layer group (30) wherein first insulating layers (32, 34, 36, 38) are laminated to each other, and an inner electrode (14) is disposed at the primary surfaces of the first insulating layers (32, 34, 36, 38). At least one (14x) of the inner electrodes (14) is disposed between first insulating layer (32) and second insulating layer (20). When at least one of Ba, Sr, and Ca is represented by "A", at least one of Ti, Zr, and Hf is represented by "B", and oxygen is represented by "O", the first and second insulating layers (32, 34, 36, 38, 20, 22) contain the perovskite-type compound represented by the chemical formula ABO3 as the primary component. Of the first and second insulating layers (32, 34, 36, 38, 20, 22), vanadium is only added to the first insulating layers (32, 34, 36, 38).

SHIMADA KOHEI (JP)
WADA HIROYUKI (JP)
ARAKI KEISUKE (JP)
YOSHIOKA HIROYUKI (JP)
ISHIBASHI MASATO (JP)

PCT/JP2012/052861

August 30, 2012

February 08, 2012

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MURATA MANUFACTURING CO (JP)
SHIMADA KOHEI (JP)
WADA HIROYUKI (JP)
ARAKI KEISUKE (JP)
YOSHIOKA HIROYUKI (JP)
ISHIBASHI MASATO (JP)

H01G4/12; C04B35/468; C04B35/49; H01G4/30

WO2008126351A1

2008-10-23

JP2009212261A	2009-09-17
JP2000243648A	2000-09-08
JP2008239402A	2008-10-09
JPH03209806A	1991-09-12

YAMAMOTO TOSHINORI (JP)
Toshinori Yamamoto (JP)

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