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Title:
LAMINATED CERAMIC ELECTRONIC COMPONENT, METHOD FOR MANUFACTURING SAME, AND CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2024/053230
Kind Code:
A1
Abstract:
This laminated ceramic electronic component has: a substantially cuboid laminate that includes a plurality of internal electrode layers and a plurality of dielectric layers that are alternatingly laminated; and a pair of external electrodes that respectively cover a pair of end surfaces of the laminate that face opposite directions, the external electrodes being alternatingly connected to the plurality of internal electrode layers along the lamination direction of the laminate. The surface roughness of at least one of a pair of first surfaces facing away from one another in the lamination direction, among the four surfaces of the laminate excluding the pair of end surfaces, is less than the surface roughness of at least one of a pair of second surfaces facing away from one another in a direction that is substantially orthogonal to each of the lamination direction and an opposing direction in which the pair of end surfaces face away from one another. 

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JP2015207641CAPACITOR UNIT
Inventors:
IWAI DAISUKE (JP)
Application Number:
PCT/JP2023/024974
Publication Date:
March 14, 2024
Filing Date:
July 05, 2023
Export Citation:
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Assignee:
TAIYO YUDEN KK (JP)
International Classes:
H01G2/06; H01G4/224; H01G4/30
Foreign References:
JP2009176771A2009-08-06
JP2018046131A2018-03-22
JP2016092289A2016-05-23
JPH09260204A1997-10-03
Attorney, Agent or Firm:
KATAYAMA, Shuhei (JP)
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