Title:
LATCHING ELECTRONIC CIRCUIT FOR RANDOM NUMBER GENERATION
Document Type and Number:
WIPO Patent Application WO2004012156
Kind Code:
A3
Abstract:
A physical random number generator has a bi-stable latch that operates to generate a random number bit in response to a reception of one or more voltage input signals and a clock signal. A voltage source provides the voltage input signal(s) for provoking the bi-stable latch into a metastable state. A clock provides the clock signal for triggering the bi-stable latch. When triggered, the bi-stable latch latches the random number bit as a function of its metastable state provoked by the voltage input signal(s).
Inventors:
HARS LASZLO
Application Number:
PCT/IB2003/003231
Publication Date:
June 03, 2004
Filing Date:
July 14, 2003
Export Citation:
Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
PHILIPS CORP (US)
PHILIPS CORP (US)
International Classes:
G06F1/02; G06F7/58; G07C15/00; H03K3/037; H03K3/84; (IPC1-7): G06F7/58
Foreign References:
| US5963104A | 1999-10-05 |
Other References:
KINNEMENT D J; CHESTER E G: "Design of an on-chip random number generator using metastability", ESSCIRC 2002 PROCEEDINGS ON THE 28TH EUROPEAN SOLID-STATE CIRCUIT CONFERENCE, 24 September 2002 (2002-09-24) - 26 September 2002 (2002-09-26), Firenze, Italy, pages 595 - 598, XP002273019
BELLIDO M J ET AL: "A simple binary random number generator: new approaches for CMOS VLSI", CIRCUITS AND SYSTEMS, 1992., PROCEEDINGS OF THE 35TH MIDWEST SYMPOSIUM ON WASHINGTON, DC, USA 9-12 AUG. 1992, NEW YORK, NY, USA,IEEE, US, 9 August 1992 (1992-08-09), pages 127 - 129, XP010057783, ISBN: 0-7803-0510-8
WALKER S ET AL: "Evaluating metastability in electronic circuits for random number generation", IEEE COMPUTER SOCIETY WORKSHOP VLSI 2001, 19 April 2001 (2001-04-19) - 20 April 2001 (2001-04-20), pages 99 - 101, XP010541763
BELLIDO M J ET AL: "A simple binary random number generator: new approaches for CMOS VLSI", CIRCUITS AND SYSTEMS, 1992., PROCEEDINGS OF THE 35TH MIDWEST SYMPOSIUM ON WASHINGTON, DC, USA 9-12 AUG. 1992, NEW YORK, NY, USA,IEEE, US, 9 August 1992 (1992-08-09), pages 127 - 129, XP010057783, ISBN: 0-7803-0510-8
WALKER S ET AL: "Evaluating metastability in electronic circuits for random number generation", IEEE COMPUTER SOCIETY WORKSHOP VLSI 2001, 19 April 2001 (2001-04-19) - 20 April 2001 (2001-04-20), pages 99 - 101, XP010541763
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