Title:
LAYERED CERAMIC ELECTRONIC COMPONENT AND ASSEMBLY
Document Type and Number:
WIPO Patent Application WO/2023/188282
Kind Code:
A1
Abstract:
The present invention relates to a layered ceramic electronic component in which a first side surface electrode (51) connects a first external electrode layer (31) and a second internal electrode layer (42) to each other on a first side surface (S1) of a piezoelectric ceramic section (70) and is separated from a first internal electrode layer (41). A second side surface electrode (52) connects a second external electrode layer (32) and the first internal electrode layer (41) to each other on a second side surface (S2) and is separated from the second internal electrode layer (42). The ratio of a part in which all of a region of overlap between the first external electrode layer (31) and the first internal electrode layer (41), a region of overlap between the first internal electrode layer (41) and the second internal electrode layer (42), and a region of overlap between the second external electrode layer (32) and the second internal electrode layer (42) overlap in a two-dimensional layout is 75% or more with respect to the region in which the piezoelectric ceramic section (70) is arranged.
Inventors:
MORISHITA AKIFUMI (JP)
HIBINO TOMOHIKO (JP)
HIBINO TOMOHIKO (JP)
Application Number:
PCT/JP2022/016553
Publication Date:
October 05, 2023
Filing Date:
March 31, 2022
Export Citation:
Assignee:
NGK INSULATORS LTD (JP)
International Classes:
H01L41/09
Foreign References:
| JP2007165372A | 2007-06-28 | |||
| JPH0371667U | 1991-07-19 | |||
| JP2020009949A | 2020-01-16 | |||
| US20210376220A1 | 2021-12-02 |
Attorney, Agent or Firm:
YOSHITAKE Hidetoshi et al. (JP)
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