Title:
LEVEL SHIFTER CIRCUIT, SCANNING LINE DRIVER AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2010/140556
Kind Code:
A1
Abstract:
Disclosed is a scanning line driver that allows further reduction of circuit scale and production costs. A gate driver (100) is provided with a shift register circuit (1) with g latch circuits (21 - 2g), g selector circuits (8) and g level shifter circuits (3). The level shifter circuit (3) of an output driver circuit (st1) receives as inputs: a pulse (61) from a NAND circuit (6) of the selector circuit (8) via an input terminal (N1); a pulse (71) from a NAND circuit (7) of the selector circuit (8) via an input terminal (N2); and a pulse (Q1) from a latch circuit (21) via an input terminal (N3). The level shifter circuit (3) of the output drive circuit (st1) outputs the voltage signal obtained by transforming the voltage level of the pulse (61) via an output terminal (O1) and the voltage signal obtained by transforming the voltage level of the pulse (71) via another output terminal (O2).
Inventors:
ISHIDA TATSUYA
Application Number:
PCT/JP2010/059148
Publication Date:
December 09, 2010
Filing Date:
May 28, 2010
Export Citation:
Assignee:
SHARP KK (JP)
ISHIDA TATSUYA
ISHIDA TATSUYA
International Classes:
G09G3/20; G09G3/36; H03K19/0185
Foreign References:
| JP2005321510A | 2005-11-17 | |||
| JP2006338027A | 2006-12-14 | |||
| JPH06318055A | 1994-11-15 | |||
| JP2010039208A | 2010-02-18 |
Attorney, Agent or Firm:
HARAKENZO WORLD PATENT & TRADEMARK (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
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