Technical field

This invention relates to light pen detec¬ tion systems of the kind including a cathode ray tube having a display screen, video drive means adapted to form .indicia images on and contrasting visually "with the background of said display screen, a light pen provided with transducing means adapted to detect said indicia images, and verifying means * coupled to said video drive means and adapted to cause said video drive means to provide a visual indication on said display screen of the one of said indicia images detected by said transducing means. The invention also relates to methods of detecting images o'n a television screen. Bac ground Art In light pen detection systems of the kind specified the particular indicia image detected by the light pen may be utilized in processing data for display on the display screen or for use in a data terminal device. The indicia images may be in the form of alphanumeric characters. In operation the light pen which may be connected to a processor located in a terminal device, is positioned adjacent the character desired to be read. After the operator is sure that the light pen is properly pointed at the desired character or field, a switch is activated. Signals generated by the light pen as a result of sensing the display of the selected character are transmitted to control circuits which determine the position of the character sensed by the light pen. The character position sensed is

then transmitted to the processor which utilizes this information, to provide further processing operations with respect to the character sensed at that position. -ne problem encountered in this 5 type of sensing operation is that of verifying to the operator that the character desired to be sensed is in fact the character detected by the light pen, such verification presenting problems due to parallax and also to the inherent difficulty

10 in selecting one character out of a field of characters.

A light pen detection system of the kind specified is known from U.S . Patent Speci ication No. 3,509,350.

15 In this known system the indicia image detected by the light pen is distorted by blanking out a portion of the image, thereby providing a visual indication to the operator of the detected indicia image.

20 T E known system has the disadvantage that the distortion may not be readily observable due to a lack of adequate contrast between the indicia images and the backgound of the display screen.

25 t is a object of the present invention to provide a light pen detection system of the kind specified wherein the aforementioned disadvantage is alleviated.

Disclosure of Inv^ention

3O According to thepresent invention there is provided a light pen detection system of the kind specified wherein said verifying means is adapted to reverse the visual contrast of the de¬ tected indicia image and an adjacent background

35 region of said display screen.

3 -

It will be appreciated that a light pen system according to the immediately preceding paragraph has the advantage that the detected indicia image is readily discernible to the 5 operator by virtue of the reversal of visual contrast of the detected indicia image as compared with the remaining displayed indicia images.

According to a further aspect of the invention, there is provided a method of detecting

10 images on a television screen adapted to have a plurality of indicia images displayed thereon, including the steps of moving a light pen includ¬ ing transducing means adjacent to a selected one of said images, generating a detection signal in

_ ₂ < response to the detection of said selected indicia image by said transducing means and providing a visual indication on said television screen of the selected image, characterized by the step of reversing the visual contrast of the detected 0 indicia image and an adjacent background region of said television screen.

According to an advantageous feature of a preferred embodiment of the invention, locking means is provided e fective to prevent a further 5 indicia image from being detected as long as the light pen is continuing to detect a particular indicia image. This has the advantage that if the light pen is inadvertently moved so as to receive light from an adjacent indicia image in jO addition to the original indicia image then only the original character will have its visual cont¬ rast inverted to indicate detection.

Brief description of drawings

One embodiment of the invention will now be described by way of example with reference to the accompanying drawings, in which:- 5 Fig. 1 is a simplified block diagram of a data processing system including a light pen detection system in accordance with the invention;

Fig. 2 is a block diagram of a control circuit employed in the system shown in Fig. 1;

10 Fig. is a circuit diagram of a locking circuit arrangement employed in the system shown in Fig. 1; and

Fig. 4 is a timing diagram useful in explaining the operation of the system shown in

15 Fig. 1.

Best Mode for Carrying out the Invention

Referring now to Fig. 1, the light pen detection system shown therein includes a cathode ray tube (CRT) 20 on which is projected data in

20 tine form of alphanumeric characters under the control of X and Y scan circuits 22 and 2 , respectively, each of which contains the deflectio signals in analog form in accordance with digital information stored in a central processing unit

25 (CPU) 26. The digital information stored in the

CPU 26 is transmitted through a control circuit 28 which converts the digital information into the appropriate analog signals for outputting to the X and Y scan circuits 22, 24 for displaying the

30 data on the CRT in a manner that is well known in the art. The control circuit 28 will also gener¬ ate a control signal for controlling the video drive circuit 30 of the CRT 20 in illuminating the displayed characters and to provide a character

35 identification signal.

Associated with the CRT 20 is a light pen 32 of well known construction which includes a light sensing transducer (not shown) actuated by the gener¬ ation of a source of light on the screen of the CRT 20 sensed by the transducer, the transducer outputting a signal PLO (Fig. 4) indicating the detection of the light source. This output signal PLO is transmitted over a line 3 to the control circuit 28 for con¬ trolling the video drive } " 0 to provide an indication to the operator of the source of light sensed by the light pen 3 and for use in identifying the location of the source of light on the screen of the CRT, from which the CPU 26 will execute a program in accordance with the location of that particular source of light sensed by the light pen. In the present embodiment, the light pen system is incor¬ porated in a data terminal device in which data in the form of alphanumeric characters is displayed on the screen of the CRT in response to the sensing of previously displayed alphanumeric characters on the CRT 20.

Referring now to Fig. 2, there is shown a block diagram of the control circuit 28 (Fig. l) used in the present embodiment. Included in the control circuit 28 is a character counter 36 clocked by a system clock transmitted from an oscillator 3 (Fig. l) over line 40 to the character counter 36. The character counter 36 outputs a count for each character position on each hori ^z ontal scan line of the CRT screen in a manner that is well known in the art. A line counter 42 is also included, which is clocked by the system clock transmitted over line 44 from the character counter 36, the count output of the line counter 42 being equal to each line position on the CRT screen. In conventional

CRT scanning operations the number of characters and lines displayed may vary. Normally, there are 24 or 25 lines of characters capable of being displayed on the CRT screen with 8θ character 5 positions on each line. The system clock is selected to correspond to one character time on each horizontal scan line which in the present embodiment is 619 nanoseconds.

The output counts of the counters 3 and

10 42 are used as addresses to address a CRT buffer memory unit 46 over buses 90 and 92 _τ which memory 46 has stored at each character position the character data to be displayed, and which data has been loaded into the memory unit 46 over a bus 48

15 from the CPU 26 (Fig. l). The output of the memory unit 46, in the form of binary data, is transmitted to a character generator 50 which converts the binary data representing the character to be displayed into the appropriate dot pattern

20 which is to form the displayed character. The characters may be displayed using the well known five by seven dot matrix con iguration, although any other dot matrix configuration may be used. The output of the character generator 50 is then

25 transmitted through a parallel to serial conver¬ ter 52, a logical exclusive OR circuit 5^* _. and the video drive circuit 30 (see also Fig, l) for displaying on the CRT 20 screen the dot pattern representing the character programmed to be

30 displayed at the character position identified by the output of the counters 36 and 42.

The outputs of the counters 36 and 42 are also transmitted over the buses 90 and 92 to a latch 8 and a comparator 60 to provide a

35 character identification condition and a locking

condition for the operation of the light pen 32 (Fig. l) in a manner which will now be described, As previously disclosed, the output signal PLO (Fig. 4) of the light pen 32 is generated upon the positioning of the light pen adjacent a character displayed on the screen. The light pen 3 outputs a signal of +5 volts when it does not see a light source and a 0 volts signal when it does see a light source. The output signal PLO is transmitted over the line 34 (see also Fig. l) to an inverter circuit 62 whose output signal PLO is transmitted over a line 64 to one input of a logical NAND circuit 66 over a line 4 to an input of a second logical NAND circuit 70 conditioning the latter circuit to output a signal COMPARE (Fig. 4) over a line 9 to a locking circuit 7 upon receiving a control signal from the comparator 6θ in a manner that will be described hereinafter.

Upon sensing each dot in a displayed character positioned adjacent the tip of the light pen 32, the output signal PLO generated by the transducer in the light pen ² will go low (Fig. 4) resulting in the output signal PLO going high. This latter signal is gated by the NAND circuit 66- which has been enabled by a signal PLEN (Fig. 4) being inputted to the other input of the NAND circuit 66 over a line 74 ^" from the locking circuit 72 (Fig. 2). The signal PLEN is high at this time. The output of the NAND circuit 66 is connected to the D input (F_Tg. 2) of a D-type flip-flop 76 whose preset input is connected to the CRT video drive circuit 30 (Fig. l) to receive a vertical blanking signal VBL which, as shown in Fig. 4, goes low at the end of each scan operation of the CRT. The flip—flop 76 receives the character clock over a line

78 from a logical NAND circuit 80 whose inputs are connected to the oscillator 38 (Fig. l) and the output line 82 of the flip-flop 76. The gating of the input signal PLO by the NAND circuit 66 wil 5 output a low signal LATCH ENABLE (Fig. 4) to the D input of the flip-flop 76 (Fig. 2 ) resetting the flip-flop thereby outputting a high signal DXFER for one scan period (Fig. 4) to the latch 58 setting the latch. The resetting of the flip-flo ° 76 by the LATCH ENABLE signal will also result in the output of a low signal over the line 82 to the logical NAND circuit 8θ thereby disabling the clocking of the flip-flop 76 by the character clock over the line 78. The setting of the latch 5 58 at this time will output over buses 84, 86 the counts received from the character counter 36 and the line counter 42 respectively, representing the position of the character sensed by the light pen 32. The latched output of the counts of the counters 3 and 42 are transmitted to the CPU 26 over the buses 84, 86 which will, in the present application, generate a new display of characters in accordance with the character sensed by the lig pen. The latched output of the latch 58 is also transmitted to the comparator 6θ which will output a signal COMPARE over a line 88 upon finding a coincidence between the latched output transmitted from the latch 8 over the buses 84 and 86 and the counter j and 42 outputs transmifcted over buses 90 and 92. '

The output signal COMPARE of the compara¬ tor 6θ is transmitted over the line 88 to one input of the exclusive OR circuit 5*± which inverts the signal from the converter 5 transmitted to the 5 other input of the circuit over line 53. to provide

an INVERSE VIDEO signal (Fig. 4). The output signal COMPARE is high whenever the scanning electron beam of the CRT passes over the position of the latched character. When this occurs, the video drive 30 (Fig. l) will effect a contrast reversal or inversion of the display of the latched character, that is, the latched character will be displayed as white on a black background where characters are normally displayed black over white, and black on white for those situations where. the characters are normally displayed white over black. The signal COMPARE is outputted from the comparator 6θ as long as the light pen 3 picks up any light from the latched character. If the pen is removed from the latched character, the outputs of the latch 8 will go high (0 bits) which do not match the output of the counters 36, 42, thereby keeping the output of the comparator 60 low. The effect of inverting the display field by the video drive 30 upon sensing a character position produces a reversal in contrast of the character which is being sensed by the light pen 32, allowing the operator to observe the location of the sensed character and to take any steps necessary to ensure that the desired character is being sensed by the light pen 3 . It will be appreciated that manual movement of the light pen into and out of the detected character position will cause the appear¬ ance of the detected character to flash or flicker in synchronism with such movement.

The output signal COMPARE from the comparator 6θ is also transmitted to the logical NAND circuit 70 (Fig. 2) which has been enabled by the output signal PLO received over a line 9*** from the inverter circuit 62 (Fig. 2). The

output signal COMPARE (Fig. 4) of the NAND circui 70 is transmitted over a line to the clear input of a D-type flip-flop 98 (Fig. 3) located in the locking logic circuit 72 (Fig. 2). The 5 output signal SPLEN (Fig. 4) of the flip-flop 98 is normally high due to the +5 volt source on the input 100 (Fig. 3). When the signal COMPARE goes low upon the latching of a character by light pen 32 (Fig. l), the output signal SPLEN which is 10 transmitted over a line 102 to ^* a further D-type flip-flop 104 goes high to low, thereby switching the outputs of the flip-flop 104. The clearing of the flip; lop 104 results in the output signal PLEN (Fig. 4) being switched from high to low upo

15 the generation of the next clock signal VBL while the second output signal LOCK of the flip-flop 10 is switched from low to high.

The switching of the output signal PLEN of the flip-flop 104 from high to low (Fig, 4)

20 disables the logical NAND circuit 66 (Fig. 2) fro resetting the flip-flop 76 in a manner which has been described .previously, the flip-flop 7 being in a set condition due to the previous generation of the preset signal VBL. It will be seen that 25 this condition effectively locks the output of th latch 58 on the character position originally sens by the light pen 32. This is advantageous, as wi now be explained. If the light pen 3 is in¬ advertently positioned adjacent the original 30 character position so as to receive light from an adjacent character position in addition to the original character position, the output signal COMPARE of the comparator 6θ will still provide an inverted video operation on the CRT 20 wherein 35 • "the original character sensed by the light pen

will remain inverted without interference from the adjacent character. The logical NAND circuit 66 will remain disabled as long as the signal PLO is generated by the light pen 3 based on receiving light from the original character position.

The switching of the output signal LOCK (Fig. 3) from low to high (Fig. 4) upon the inputt¬ ing of the rising edge of the signal VBL to the flip-flop 104 will condition, over a line lθ6, a trailing edge detector lθ8 which comprises a pair of IK resistors 110 and a l,.OOOpf capacitor 112. Upon the removal of the light pen 3 to a position where all light from the latched character position is lost, the signal PLO goes high and PLO goes lo.w when the electron beam passes over the latched character position thereby disabling the NAND circuit 70 (Figs. 2 and 3) whose output signal

COMPARE becomes high allowing the flip-flop 98 (Fig. 3) to remain in a set condition due to the genera— tion of the last VBL signal. With the flip-flop 8 in a set condition, ^* Qne output signal SPLEN will remain high allowing the clock .signal VBL to set the flip-flop 104 which switches the output signal PLEN from low to high (Fig. 4) and the output signal LOCK from high to low.

As shown in Fig. 3 _. when the LOCK signal goes from high (+5 volts) to low (0 volts), the capacitor 112 will be initially discharged and then charged to 5 volts by the + volts received over

A line 114 from a 5 volt power supply (not shown). As shown in Fig. 4, the output of the edge detector lθ8 comprises the RESET signal which when going low upon the LOCK signal going low will be transmitted over line ll6 to reset the latch 8 (Fig. 2) there¬ by conditioning the latch 8 and the circuit for a new character position detection operation.

It is thus seen that the circuit disclos in the present invention provides a positive identification of the character snsed by the light pen 3 together with a locking feature which pre¬ vents any interference with the sensing signal as long as the light pen receives light from the original character sensed.

It will be appreciated that the system described is implemented in a low-cost manner.