Title:
LOAD DRIVE CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2024/009872
Kind Code:
A1
Abstract:
One end of an external load 2 is connected to a first output terminal OUT1, and the other end of the external load 2 is connected to a second output terminal OUT2. A PMOS transistor MP1 is connected between a power terminal VDD and the first output terminal OUT1, and an NMOS transistor MN1 is connected between a ground terminal GND and the second output terminal OUT2. A controller 110 performs ON/OFF control of the PMOS transistor MP1 and the NMOS transistor MN1 according to a control signal EN.
Inventors:
KOJA NOZOMU (JP)
ONO AKIHIRO (JP)
ONO AKIHIRO (JP)
Application Number:
PCT/JP2023/024050
Publication Date:
January 11, 2024
Filing Date:
June 28, 2023
Export Citation:
Assignee:
ROHM CO LTD (JP)
International Classes:
H03K19/0175; H03K17/00; H03K17/687; H03K19/0185
Foreign References:
JP2006333278A | 2006-12-07 | |||
JP2009278159A | 2009-11-26 |
Attorney, Agent or Firm:
MORISHITA Sakaki (JP)
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