CIRCUITS

CROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application claims priority to U.S. Provisional Application No. 61/908,944, entitled "A LOW POWER LO DISTRIBUTION AND PHASE-SHIFTING SCHEME FOR HIGH-FREQUENCY BEAMFORMING," filed November 26, 2013.

BACKGROUND

[0002] With rapid growth in wireless usage by smart phones, tablet computers, and other mobile computing devices, wireless operators are constantly looking for ways to improve operating efficiencies of wireless networks. Multiple input/multiple output ("MIMO") is one technique that has been utilized to improve network throughput, capacity, and coverage. MIMO typically involves receiving and/or transmitting signals via multiple receivers and/or transmitters. For example, a smartphone may include two or more antennas individually configured to receive a corresponding signal. The received signals can then be combined into a aggregate signal by applying a phase shift and/or amplitude control to at least one of the received signals in a process commonly referred to as beamforming. The individual signals received at the antennas can carry different information, and thus may increase communications throughput to the computing device via an existing wireless network.

BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Figure 1 is a schematic diagram of an electronic device in accordance with embodiments of the disclosed technology.

[0004] Figure 2 is a schematic diagram showing a radio receiver suitable for the electronic device of Figure 1 in accordance with embodiments of the disclosed technology.

[0005] Figures 3A-3D are schematic circuit diagrams showing a signal processor having a sub-harmonic injection-locked local oscillator ("SILO") in accordance with embodiments of the disclosed technology. [0006] Figure 4 is a schematic circuit diagram showing another SILO in accordance with embodiments of the disclosed technology.

[0007] Figure 5 is a graph showing measured a free-running tuning range of an example SILO and variation of power consumption versus tuning voltage in accordance with embodiments of the disclosed technology.

[0008] Figures 6 and 7 are graphs each showing a locking range of an example SILO when an 4 ^th and 8 ^th sub-harmonic signal is injected, respectively, in accordance with embodiments of the disclosed technology.

[0009] Figure 8 is a graph showing measured phase shift output values for an example SILO in accordance with embodiments of the disclosed technology. The phase shift output was measured at 13.25 GHz, and phases P1 -P7 correspond to the Vtune of 0.946, 0.954, 0.960, 0.97, 0.975, 0.981 , 0.984 volts, respectively

[0010] Figure 9 is a schematic circuit diagram showing an example radio transmitter in accordance with embodiments of the disclosed technology.

DETAILED DESCRIPTION

[001 1 ] Specific details of several embodiments of the technology are described below with reference to electronic devices, local oscillator circuits, and methods for operating local oscillators. Several embodiments can have configurations, components, or procedures different than those described in this section, and other embodiments may eliminate particular components or procedures. A person of ordinary skill in the relevant art, therefore, would understand that the technology may have other embodiments with additional elements, and/or may have other embodiments without several of the features shown and described below with reference to Figures 1 - 9.

[0012] In wireless communications devices, incoming radio frequency ("RF") signals are typically digitized using analog-to-digital converters before further digital processing can be performed. However, directly digitizing high frequency RF signals (e.g., greater than 30 MHz) can be costly. As such, local oscillators ("LO") are often used to shift frequencies of incoming RF signals to intermediate frequencies ("IF") before digitization. However, local oscillator routing at high frequencies tends to be power hungry and extremely sensitive to routing parasitic and routing symmetry. Several embodiments of the disclosed technology utilize sub-harmonic LO routing with an injection locked voltage controlled oscillator ("VCO") to address at least some of the foregoing difficulties. As a result, the LO routing can be less sensitive to layout parasitic and has lower power consumption levels than conventional techniques.

[0013] Figure 1 is a schematic diagram of an electronic device 100 in accordance with embodiments of the disclosed technology. The electronic device 100 can be a smartphone, a tablet computer, a laptop computer, or other suitable types of device. As shown in Figure 1 , the electronic device 100 can include a radio receiver 101 , a processor 106, a memory 108, and an input/output component 1 10 operatively coupled to one another. The radio receiver 101 can include one or more antennas 102, a signal processor 104. Two antennas 102 are shown for illustration purposes though the radio receiver 101 can include any suitable number of antennas. The electronic device 100 can also include one or more of a display 1 12 (e.g., a touchscreen), a speaker 1 14, or a light 1 16 (e.g., an LED). Even though only certain components are shown in Figure 1 , in other embodiments, the electronic device 100 can also include sensors, power/signal ports, and/or other suitable components.

[0014] The processor 106 can include a microprocessor, a field-programmable gate array, and/or other suitable logic devices. The memory 108 can include non- transitory volatile and/or nonvolatile media (e.g., ROM; RAM, magnetic disk storage media; optical storage media; flash memory devices, and/or other suitable storage media) and/or other types of computer-readable storage media configured to store data received from, as well as instructions for, the processor 106. As used herein, the term "computer-readable storage media" excludes propagated signals. The input/output component 1 10 can include a driver for the display 1 12, the speaker 1 14, the light 1 16, or other suitable types of input/output devices (e.g., a keyboard, a mouse, or a printer).

[0015] The signal processor 104 can be configured to process incoming RF signals 105 received at the antennas 102 into digital signals 107. The signal processor 104 can then provide the digital signals 107 to the processor 106 for further processing. For example, in one embodiment, the digital signals 107 may contain a media stream (e.g., a movie), and the processor 106 can execute a suitable application program and produce media frames to be output to the display 1 12 and corresponding audio output to the speaker 1 14. As described in more detail below with reference to Figure 2, several embodiments of the signal processor 104 can utilize a SILO for converting the RF signals 105 into IF signals (not shown) before digitization. [0016] Figure 2 is a schematic diagram showing a radio receiver 101 suitable for the electronic device 100 of Figure 1 in accordance with embodiments of the disclosed technology. As shown in Figure 2, the signal processor 104 can include a first branch 121 a coupled to the first antenna 102a and a second branch 121 b coupled to the second antenna 102b. Each of the first and second branches 121 a and 121 b can include a low noise amplifier ("LNA") 122, a variable gain amplifier ("VGA") 124, a mixer 126, and a SILO 130 operatively coupled to one another. The first and second branches 121 a and 121 b merge at the IF summer 128 before an IF down converter (not shown) or before an analog-to-digital converter (not shown). Even though only two branches 121 a and 121 b are shown in Figure 2, in other embodiments, the signal processor 104 can include any other suitable number of branches.

[0017] The low noise amplifier 122 is configured to amplify the RF signal 105 captured by the corresponding antenna 102. The variable gain amplifier 124 can be configured to scale the captured RF signal 105 before providing the RF signal 105 to the mixer 126. The low noise amplifier 122 and the variable gain amplifier 124 can include any suitable implementations. For example, the low noise amplifier 122 can be implemented using junction gate field-effect transistors, hetero-structure field effect transistors, and/or other suitable components. In another example, the variable gain amplifier 124 can be implemented using a voltage-controlled resistor to set a gain of the variable gain amplifier 124.

[0018] The SILO 130 is configured to generate a local oscillation signal 109 to the mixer 126 based on an injection signal 132 from, for example, a phase locked loop ("PLL," not shown) or other suitable sources. The local oscillation signal 109 has both (1 ) a target frequency and (2) a target phase angle for shifting the frequency and phase angle of the RF signal 105. In certain embodiments, the injection signal 132 can be N ^th sub-harmonic to the LO signal 109. N is a positive integer that can be 2, 3, 4, 5, 6, 7, 8, or other suitable values. The injection signal 132 ( V _inj ) can be represented by the following:

V _inj = Csm( m ₀ tlN + <$> _inj ) where C is amplitude, m ₀ is the target frequency of the LO signal 109, and _inj \s a phase angle of the injection signal 132. As such, the SILO 130 is configured to generate the local oscillation signal 109 at the target frequency ( m ₀ ) by multiplying the frequency and phase angle ( Φ _ίΒ7 ) of the injection signal 132 by N, as follows:

V _LO = C∞s(m ₀ t + N _lnJ )

In other embodiments, the injection signal 132 can have other suitable frequency and/or phase angle values. Example circuits for implementing the SILO 130 are described in detail below with reference to Figures 3 and 4.

[0019] The mixer 126 is configured to generate an IF signal 1 1 1 based on the RF signal 105 from the VGA 124 and the LO signal 109 from the SILO 130. The IF signal 1 1 1 can have a frequency that is a difference between frequencies of the RF signal 105 and the LO signal 109. For example, the RF signal 105 can have a frequency of 824 to 849 MHz, and the LO signal has a frequency of 823 MHz. Thus, the IF signal 1 1 1 can have a frequency of 1 -26 MHz. The mixer 126 can include a suitable nonlinear electrical circuit (e.g., using diodes or switches) that generates a signal with new frequencies based on input signal frequencies.

[0020] The IF summer 128 is configured to combine the IF signals 1 1 1 from the first and second branches 121 a and 121 b and provide the combined signal to an IF down converter (not shown), an analog-to-digital converter (not shown), and/or other suitable components for further processing. In certain embodiments, the IF summer 128 can have similar structures and/or functions as the mixer 126. In other embodiments, the IF summer 128 can have different structures and/or functions than the mixer 126.

[0021] In operation, the antennas 102 capture the RF signals 105, which are then suitably amplified by the low noise amplifiers 122 and the variable gain amplifiers

124. The SILOs 130 generates local oscillation signals 109 with corresponding target frequency and phase angle based on the injection signals 132. In certain embodiments, the injection signals 132 are sub-harmonic to the local oscillation signals

109. Thus, the SILO 130 generates the local oscillation signals 109 by multiplying the frequency and phase angle by the sub-harmonic number of the injection signal 132. As described in more detail below with reference to Figure 3, the signal processor 104 can also include a digital controller (not shown) configured to control the phase angle of the local oscillation signals 109 based on a signal from the SILO 130. The mixers 126 can then combine the amplified RF signals 105 and the local oscillation signals 109 to aenerate the IF sianals 1 1 1 . The IF summer 128 can then combine the IF signals 1 1 1 before providing a combined signal to IF down converter or other suitable downstream processing components.

[0022] Figure 3A is a schematic circuit diagram showing a signal processor 104 having a sub-harmonic injection-locked local oscillator ("SILO") 130 in accordance with embodiments of the disclosed technology. As shown in Figure 3A, in the illustrated embodiment, the signal processor 104 includes a phase angle controller 160 (e.g., a digital controller) operatively coupled to the SILO 130. The phase angle controller 160 is configured to control a phase angle of output local oscillator signal 109 by adjusting a tuning voltage (V ) to the SILO 130 based on, for example, a phase measurement signal from an output inductor LT, as described in more detail below. In other embodiments, the phase angle controller 160 may be a component separate from the signal processor 104.

[0023] As shown in Figure 3A, the SILO 130 can include a phase shifter 142, a matching filter 144, a resonance tank 146, and a transformer-coupled oscillator 150 operatively coupled to one another. Even though particular components of the SILO 130 are shown in Figure 3A, in other embodiments, the SILO 130 can include fewer components. For example, in certain embodiments, the phase shifter 142 may be omitted. In further embodiments, the SILO 130 may include additional and/or different components, one example of which is described below with reference to Figure 4.

[0024] In certain embodiments, the phase shifter 142 is configured to controllably shift a phase angle of the injection signal 132 by 180° divided by the sub-harmonic number N of the injection signal 132. For example, when the sub-harmonic number of the injection signal 132 is 8, the phase shifter 142 is configured to shift a phase angle of the injection signal 132 by 180°/8=22.5°. Thus, the phase shifter 142 can shift a phase angle of 22.5° of the injection signal 132 to generate an LO signal 109 having a phase angle of 8 ^χ 22.5°=180°. In other embodiments, the phase shifter 142 can also be configured to controllably shift a phase angle of the injection signal 132 by other suitable values. The phase shifter 142 can be implemented using PIN diodes, CMOS switches, and/or other suitable components. One example phase shifter is described in a Publication entitled "An 8-Channel Ku Band Transmit Beamformer with Low Gain/Phase Imbalance Between Channels" by Siqi Zhu et al., the disclosure of which is incorporated herein in its entirety.

[0025] In the illustrated embodiment, the phase angle controller 160 can achieve mntrnllahl ^p nhas ^p shifting by enabling (or disabling) the phase shifter 142 with a phase shifter signal 162. For instance, in the example above, if the phase angle controller 160 enables the phase shifter 142, the output from the LO signal 109 would be 180°; otherwise, the output would be 0°. Thus, in certain embodiments, the phase angle controller 160 can enable the phase shifter 142 when a target phase shift between the local oscillator signal 109 and the injection signal 132 is greater than 180° and disable the phase shifter 142 when the target phase shift is less than or equal to 180°. In other embodiments, the phase angle controller 160 can control the phase shifter 142 in other suitable manners.

[0026] The matching filter 144 can be configured to transform an impedance seen at the base of the transistor Q3 to a desired characteristic impedance so as to match the output from the phase shifter 142. As shown in Figure 3A, in the illustrated embodiment, the matching filter 144 includes a resistor Rmatch coupled to ground via a matching capacitor Cmatch . The resistance and capacitance of the resistor Rmatch and matching capacitor Cmatch can be selected based at least in part on a frequency of the injection signal 132. In other embodiments, the matching filter 144 can also include other suitable components in suitable arrangements. In further embodiments, the matching filter 144 may be omitted.

[0027] The resonance tank 146 can be configured to generate a resonance signal 136 at a target frequency of the local oscillator signal 109. In the illustrated embodiment, the resonance tank 146 includes an LC circuit having a transistor Q3, a resonance capacitor Cres, and an injection inductor Linj operatively coupled to one another. The phase shifted signal 134 is coupled to the base of the transistor Q3. The capacitor Cres is coupled between the collector and emitter of the transistor Q3. The injection inductor Linj is coupled to the collector of the transistor Q3. In certain embodiments, the inductance value ( L _inj ) of the injection inductor Linj and a capacitance value ( C _res ) of the resonance capacitor Cres can be selected based on the target frequency ( f _L0 ) as follows:

7.n^L _inj C _res where f _L0 is the frequency of the local oscillator signal 109. In other embodiments, the injection inductor Linj and the resonance capacitor Cres can have other suitable inductance and capacitance, respectively. [0028] The transformer-coupled oscillator 150 can be configured to produce the local oscillator signal 109 at a target frequency and phase angle based on (1 ) the injected resonant signal 136 and (2) a tuning signal Vtune 154 from the phase angle controller 160. As shown in Figure 3A, the transformer-coupled oscillator 150 can include first transistor Qi and second transistor Q2 cross-coupled by a transformer 156. Each of the first transistor Qi and second transistor Q2 include a base, a collector, and an emitter. As showing in Figure 3, the emitters of the first and second transistors Qi and Q.2 are coupled to ground. The collectors of the first and second transistors Qi and Q.2 are coupled to opposite terminals of an output inductor LT coupled to the mixer 126. The first and second transistors Qi and Q2 also includes a parasitic capacitance C _P i and C _P 2 between respective base and emitter, respectively. The tuning signal Vtune 154 is used to bias the bases of the first and second transistors Qi and Q2 via respective isolation resisters Rbi and Rb2. In the following description, the first and second transistors Qi and Q2 are generally similar in structure and function. As a result, the parasitic capacitance C _P i and C _P 2 are generally the same and represented as C _p . In other embodiments, the first and second transistors Qi and Q2 can be metal oxide semiconductor devices or may have different structures and/or functions.

[0029] The transformer 156 Lgm can have a first transformer inductor Lgmi magnetically coupled to a second transformer inductor L _gm 2 with a coupling factor k. The first and second transformer inductors Lgmi and L _gm 2 can have an additive relative polarity. The transformer 156 is electrically coupled to the first and second transistors Qi and Q2. In particular, the first transformer inductor L _gm i is coupled to the collector of the first transistor Qi at one end and coupled to the base of the second transistor Q2 at the other end. The second transformer inductor L _gm 2 is coupled to the collector of the second transistor Q2 at one end and coupled to the base of the first transistor Qi at the other end.

[0030] The injection inductor Linj, the first transformer inductor L _gm i, and the second transformer inductor L _gm 2 are magnetically coupled to one another with select polarities between pairs of these inductors. Both the first transformer inductor L _gm i and the second transformer inductor L _gm 2 are magnetically coupled to the injection inductor Linj with a coupling factor kinj but different directions of coupling. Figure 3B is an equivalent circuit for part of the SILO 130 in Figure 3A. As shown in Figure 3B, the injection inductor Linj and the first transformer inductor L _gm i have a subtractive relative polarity. The injector inductor Linj and the second transformer inductor L _gm 2 have an additive relative polarity. The particular polarities between pairs of the foregoing inductors and the direction of coupling allows the injected signal Vinj to be constructively injected into the base of the first and second transistors Qi and Q2. As a result, a high sub-harmonic injection efficiency can be achieved, as explained in more detail below.

[0031 ] Figure 3C is another equivalent circuit for that shown in Figure 3B in which the voltages generated as a result of the injection signal Vinj are converted to and represented by a first voltage source ndi and a second voltage source Vnd2. Each of the first voltage source Vindi and a second voltage source Vind2 can have a voltage value Vind given by the following:

where G _M , Q3 is the transconductance of the transistor Q3, ZL is the impedance due to the resonant tank 146 formed by the injection inductor Linj and the resonance capacitor Cres. The transconductance G _m7 can be calculated as follows:

\ - m ² L gm C P where C _p is the capacitance of C _P i and C _P 2. The transconductance of the local oscillator 150 can be represented by:

Figure 3D is yet another equivalent circuit for that shown in Figure 3C in which the first and second voltage sources Vindi and nd2 are converted and represented by a current source iinj as follows: i _in j = (G _m,0SC + G _mZ )V _ind

In certain embodiments, Gm.osc and Gmz can have equal values, and such injection enhances the injection current by roughly a factor of 2.

[0032] Without being bound by theory, the introduction of the transformer 156 Lgm is believed to result in increased swing at the base of the first and second transistors Qi and Q2, leading to transconductance (G _M ) enhancement as follows:

-σ+*) _^ where G _m ,oid is the transconductance for a local oscillator similar to that shown in Figure 3A but without the transformer 156, ¾ = 1 / - /L _gm C _p is the self-resonant frequency of the transformer 156 Lgm and the parasitic capacitor C _P and ⁽ o _osc is the oscillation frequency. It is believed that the transformer-coupled local oscillator 150 can operate at a low supply voltage while consuming less power than conventional local oscillators due to the foregoing transconductance enhancement. As a result, low power operation of the electronic device 100 is achieved.

[0033] Referring back to Figure 3A, in operation, the resonant signal 136 having the target frequency f _L0 and a phase angle is injected into the transformer-coupled oscillator 150 via the transformer 156. As a result, the transformer-coupled oscillator 150 is forced to oscillate at the injected target frequency f _L0 . The phase angle controller 160 can then adjust the capacitance of the parasitic capacitors C _P i and C _P 2 of the first and second transistors Qi and Q2 by adjusting the tuning signal Vtune 154 in conjunction with the phase shifter 142 to achieve a target phase angle between 0° to 360° of the local oscillation signal 109.

[0034] Figure 4 is a schematic circuit diagram showing another SILO 130 in accordance with embodiments of the disclosed technology. Certain components shown in Figure 3A are omitted in Figure 4 for clarity. As shown in Figure 4, the transformer- coupled oscillator 150 can also include a first blocking capacitor CM between the base of the first transistor Qi and the second transformer inductor L _gm 2; and a second blocking capacitor Cb2 between the base of the second transistor Q2 and the first transformer inductor L _gm i . Also shown in Figure 4 are parasitic capacitors Cpd and C _pC 2 between the collector and emitter of the first and second transistors Qi and Q2, respectively.

[0035] Embodiments of the SILO 130 shown in Figure 4 were implemented in TowerJazz 1 P6M 0.13 m Bi-CMOS process with two metal layers. For measurement purposes, a down-conversion mixer was implemented on chip. A 40 GHz continuous wave signal was used as an RF signal. The IF signal output was measured using an Agilent PXA 50 GHz signal analyzer. The SILO consumes a total power of 3.72 mW to 6.57 mW from a 0.5 V supply.

[0036] The free-running frequency of the SILO was controlled by independent base bias of the cross-coupling transistor pair. Free-running tuning range was measured by switching off the injection device Q3. The free-running tuning range of the SILO is shown in Figure 5. The SILO achieved a tuning range of 17.9% centered at 53.5 GHz. Figure 5 also shows the variation in power consumption over the tuning range.

[0037] The measured 4 ^th and 8 ^th sub-harmonic (6 - 7.16 GHz) locking ranges of the SILO are shown in Figures 6 and 7, respectively. The locking range was measured at three different tuning voltages, i.e., 1 .25V, 1 .00V, and 0.86V. For a given input injection power, the injection frequency was varied until locking is observed. To eliminate the sub-harmonic local oscillator buffer amplifier, it is desirable that a large locking range be observed at low injected input power. The test SILO achieved a minimum locking range of 450 MHz at high band and 1 .4 GHz locking range at low band with about -10 dBm input power. The SILO also achieved a phase-shifting range of greater than about 150°, as shown in Figure 8.

[0038] Even though the disclosed technology is described above with reference to the radio receiver 101 in Figures 1 -2, in other embodiments, the disclosed technology can also be used as a transmitter or transceiver. Figure 9 is a schematic circuit diagram showing an example radio transmitter 201 in accordance with embodiments of the disclosed technology. As shown in Figure 9, the radio transmitter 201 includes generally the same or at least similar components as the radio receiver 101 in Figure 2 except the radio transmitter 201 includes a power amplifier 123 instead of a lower noise amplifier 122 coupled to the antennas 102. In addition, the flow direction of signals for the radio transmitter 201 are reversed as compared to the radio receiver 101 in Figures 1 -2. For instance, the mixer 126 in each of the branches 121 a and 121 b can combine the local oscillator signal 109 with the IF signal 1 1 1 to generate a high frequency RF signal 105. The VGA 124 and the PA 123 can then scale or amplify the generated RF signal 105 before transmitting the same via the corresponding antennas 102a and 102b.

[0039] From the foregoing, it will be appreciated that specific embodiments of the technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the disclosure. In addition, many of the elements of one embodiment may be combined with other embodiments in addition to or in lieu of the elements of the other embodiments. Accordingly, the disclosure is not limited except as by the appended claims.