Title:
LOGIC PROCESS-BASED LEVEL TRANSLATION CIRCUIT OF FLASH-BASED FPGA
Document Type and Number:
WIPO Patent Application WO/2023/115888
Kind Code:
A1
Abstract:
The present invention relates to the field of flash-based FPGAs. Disclosed is a logic process-based level translation circuit of a flash-based FPGA. The level translation circuit implements three-stage level translation by means of three translation modules; the first-stage translation module is used for translating an input first signal of a VDD-GND voltage domain to a second signal of a VP1-GND voltage domain; an intermediate-stage translation module is used for translating the input second signal of the VP1-GND voltage domain to a third signal of a VP1-VN voltage domain; a driving-stage translation module is used for translating the input third signal of the VP1-VN voltage domain to a driving signal of a VP2-VN voltage domain and outputting a driving word line. The pressure of each stage of translation is reduced, the capability of driving the next stage is ensured, the translation speed is increased, and the last stage provides a large driving capability.
Inventors:
CAO ZHENGZHOU (CN)
SHAN YUEER (CN)
JI ZHENKAI (CN)
SUN JING (CN)
HE CHUNYAN (CN)
LI GUANGMING (CN)
SHAN YUEER (CN)
JI ZHENKAI (CN)
SUN JING (CN)
HE CHUNYAN (CN)
LI GUANGMING (CN)
Application Number:
PCT/CN2022/102650
Publication Date:
June 29, 2023
Filing Date:
June 30, 2022
Export Citation:
Assignee:
WUXI ESIONTECH CO LTD (CN)
International Classes:
H03K19/17704; H03K19/17748
Foreign References:
| CN114285405A | 2022-04-05 | |||
| CN104882162A | 2015-09-02 | |||
| CN107045893A | 2017-08-15 | |||
| CN103795401A | 2014-05-14 | |||
| CN102893320A | 2013-01-23 | |||
| JP2002150784A | 2002-05-24 |
Attorney, Agent or Firm:
WUXI HUAYUAN PATENT AND TRADEMARK AGENCY (GENERAL PARTNERSHIP) (CN)
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