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Title:
LOOP FILTER WITH ACTIVE DISCRETE-LEVEL LOOP FILTER CAPACITOR IN VCO
Document Type and Number:
WIPO Patent Application WO/2017/112819
Kind Code:
A1
Abstract:
In described examples, a loop filter with an active discrete-level loop filter capacitor (300) can be used in a VCO (such as for CDR). In described examples, a loop filter capacitor function is simulated by sensing input loop filter current (such as with a current mirror (312) and source follower (Ml) in an input leg), and forcing back a loop filter (VCO) control voltage (VI at Nl). Loop filter voltage control is provided using a VDAC (311) with a discrete-level VDAC feedback voltage (VDAC), incremented/decremented (314, 316, 322) based on the sensed loop filter current (12). In one embodiment, the VDAC voltage (311) is provided as the non-inverting input to an amplifier (326), with the inverting input providing the control voltage (VI at Nl), forced to the VDAC feedback voltage. The VDAC feedback voltage can be provided by increment/decrement comparators (314, 316) based on a voltage deviation on a C2 capacitor (from a reference voltage) that receives the sensed loop filter current (effectively multiplying the C2 capacitance to provide a simulated loop filter capacitance).

Inventors:
FINN STEVEN ERNEST (US)
Application Number:
PCT/US2016/068132
Publication Date:
June 29, 2017
Filing Date:
December 21, 2016
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INC (US)
TEXAS INSTRUMENTS JAPAN (JP)
International Classes:
H03B29/00; H03L7/085
Foreign References:
US8188798B12012-05-29
US6753738B12004-06-22
US8278984B22012-10-02
US8781046B22014-07-15
US8154351B22012-04-10
EP1422822A22004-05-26
US7583151B22009-09-01
Attorney, Agent or Firm:
DAVIS, Michael, A., Jr. et al. (US)
Download PDF:
Claims:
CLAIMS

What is claimed is:

1. A circuit, comprising:

a VCO (voltage controlled oscillator); and

loop filter circuitry to provide a low-pass filtered VCO control voltage to the VCO, including:

current sense circuitry to sense an input loop filter current, and provide a corresponding sensed loop filter current; and

VDAC voltage control circuitry, including: VDAC circuitry including a VDAC (voltage digital-to-analog converter); and VDAC feedback circuity to generate a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current; the VDAC circuitry to generate the VCO control voltage based on the VDAC feedback voltage, which is based on the sensed loop filter current.

2. The circuit of claim 1, wherein the VDAC circuitry comprises:

an amplifier to provide a control input to the current sense circuitry, the amplifier having: a noninverting input coupled to receive the VDAC feedback voltage; and an inverting input coupled to the VCO control voltage; such that the VCO control voltage is substantially equal to the VDAC feedback voltage.

3. The circuit of claim 2, wherein the VDAC feedback circuitry comprises:

increment and decrement comparators responsive to a voltage based on the sensed loop filter current to respectively generate increment and decrement signals; and

inc/dec logic responsive to the increment and decrement signals to generate the discrete-level VDAC feedback voltage.

4. The circuit of claim 3, wherein the current sense circuitry outputs the sensed loop filter current at an output node coupled to the increment and decrement comparators, and wherein the VDAC feedback circuitry further comprises:

a capacitor C2 coupled between the output node, and a reference voltage Vref;

the increment and decrement comparators to generate the increment and decrement signals based on a deviation of a voltage V2 on C2 from Vref; and

reset circuitry coupled to C2 and responsive to a reset signal from the inc/dec logic to reset V2 to Vref after each increment and decrement signal; such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2.

5. The circuit of claim 1, wherein the current sense circuitry comprises:

a current mirror with a mirror input leg including a mirror input node coupled to receive the input loop filter current, and a mirror output leg including a mirror output node to provide the sensed loop filter current, the mirror output node coupled to the VDAC feedback circuitry; and a source follower transistor included in the mirror input leg, and controlled by the VDAC circuitry to sense the input loop filter current, which is mirrored as the sensed loop filter current to the mirror output leg based on a pre-defined mirror-ratio.

6. The circuit of claim 5, wherein the VDAC circuitry comprises:

an amplifier to provide a control input to the source follower transistor, the amplifier having: a noninverting input coupled to receive the VDAC feedback voltage; and an inverting input coupled to the VCO control voltage; such that the VCO control voltage is substantially equal to the VDAC feedback voltage.

7. The circuit of claim 6, wherein the VDAC feedback circuitry further comprises:

a capacitor C2 coupled between the mirror output node, and a reference voltage Vref; the VDAC feedback circuity to generate the discrete-level VDAC feedback voltage, incremented and decremented based on a deviation of a voltage V2 on C2 from Vref, corresponding to the sensed loop filter current; and

reset circuitry coupled to C2 and responsive to a reset signal from the inc/dec logic to reset V2 to Vref after each increment and decrement of the VDAC feedback voltage;

such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2 based on the deviation in V2 and the mirror-ratio.

8. The circuit of claim 1, wherein the loop filter circuitry comprises a charge pump loop filter.

9. A circuit, comprising:

a phase detector coupled to receive an input signal at an input frequency and phase, and generate a PD phase detect signal based on a VCO feedback signal;

a VCO (voltage controlled oscillator) responsive to a VCO control voltage to generate a VCO output signal phase aligned with the input signal, the VCO feedback signal corresponding to the VCO output signal; and loop filter circuitry coupled to receive the PD phase detect signal, and to provide a low-pass filtered VCO control voltage to the VCO, including:

current sense circuitry to sense an input loop filter current, and provide a corresponding sensed loop filter current; and

VDAC voltage control circuitry, including: VDAC circuitry including a VDAC (voltage digital-to-analog converter); and VDAC feedback circuity to generate a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current; the VDAC circuitry to generate the VCO control voltage based on the VDAC feedback voltage, which is based on the sensed loop filter current.

10. The circuit of claim 9, wherein the VDAC circuitry comprises:

an amplifier to provide a control input to the current sense circuitry, the amplifier having: a noninverting input coupled to receive the VDAC feedback voltage; and an inverting input coupled to the VCO control voltage; such that the VCO control voltage is substantially equal to the VDAC feedback voltage.

11. The circuit of claim 10, wherein the VDAC feedback circuitry comprises:

increment and decrement comparators responsive to a voltage based on the sensed loop filter current to respectively generate increment and decrement signals; and

inc/dec logic responsive to the increment and decrement signals to generate the discrete-level VDAC feedback voltage.

12. The circuit of claim 11, wherein the current sense circuitry outputs the sensed loop filter current at an output node coupled to the increment and decrement comparators, and wherein the VDAC feedback circuitry further comprises:

a capacitor C2 coupled between the output node, and a reference voltage Vref;

the increment and decrement comparators to generate the increment and decrement signals based on a deviation of a voltage V2 on C2 from Vref; and

reset circuitry coupled to C2 and responsive to a reset signal from the inc/dec logic to reset V2 to Vref after each increment and decrement signal;

such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2.

13. The circuit of claim 9, wherein the current sense circuitry comprises:

a current mirror with a mirror input leg including a mirror input node coupled to receive the input loop filter current, and a mirror output leg including a mirror output node to provide the sensed loop filter current, the mirror output node coupled to the VDAC feedback circuitry; and a source follower transistor included in the mirror input leg, and controlled by the VDAC circuitry to sense the input loop filter current, which is mirrored as the sensed loop filter current to the mirror output leg based on a pre-defined mirror-ratio.

14. The circuit of claim 13, wherein the VDAC circuitry comprises:

an amplifier to provide a control input to the source follower transistor, the amplifier having: a noninverting input coupled to receive the VDAC feedback voltage; and an inverting input coupled to the VCO control voltage; such that the VCO control voltage is substantially equal to the VDAC feedback voltage.

15. The circuit of claim 14, wherein the VDAC feedback circuitry further comprises:

a capacitor C2 coupled between the mirror output node, and a reference voltage Vref; the VDAC feedback circuity to generate the discrete-level VDAC feedback voltage, incremented and decremented based on a deviation of a voltage V2 on C2 from Vref, corresponding to the sensed loop filter current; and

reset circuitry coupled to C2 and responsive to a reset signal from the inc/dec logic to reset V2 to Vref after each increment and decrement of the VDAC feedback voltage;

such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2 based on the deviation in V2 and the mirror-ratio.

16. The circuit of claim 9, wherein the loop filter circuitry comprises a charge pump loop filter.

17. The circuit of claim 9, wherein the circuit comprise one of a phase-locked loop system, and a clock data recovery system.

18. A method suitable for simulating a loop filter capacitor function in a VCO (voltage controlled oscillator), comprising:

sensing an input loop filter current, and providing a corresponding sensed loop filter current; and

providing a VCO control voltage by: generating a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current; generating a VDAC control voltage using a VDAC (voltage digital to analog converter) based on the discrete-level VDAC feedback voltage; providing the VDAC control voltage to a non-inverting input to an amplifier; and generating the VCO control voltage at a loop filter output node coupled to an inverting input to the amplifier, the VCO control voltage based on the VDAC feedback voltage, which is based on the sensed loop filter current.

19. The method of claim 18, wherein the voltage based on the sensed loop filter current is generated using:

a capacitor C2 coupled to receive the sensed loop filter current;

incrementing and decrementing the VDAC feedback voltage based on a deviation of a voltage V2 on C2 from a voltage reference Vref; and

resetting the V2 voltage on C2 to Vref after each increment and decrement of the VDAC feedback voltage;

such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2.

20. The method of Claim 18, where the input loop filter current is sensed using:

a current mirror with a mirror input leg including a mirror input node coupled to receive the input loop filter current, and a mirror output leg including a mirror output node to provide the sensed loop filter current, the mirror output node coupled to the VDAC feedback circuitry; and a source follower transistor included in the mirror input leg, and controlled by the VDAC circuitry to sense the input loop filter current, which is mirrored as the sensed loop filter current to the mirror output leg based on a pre-defined mirror-ratio.

Description:
Loop filter with active discrete-level loop filter capacitor in VCO

[0001] This relates generally to filter circuits, and more particularly to loop filter circuits used in phase-locked loop (PLL) circuits, such as for clock data recovery.

BACKGROUND

[0002] Analog phase-locked loop control systems include a VCO (voltage or current controlled oscillator) with a frequency/phase control loop including a phase (or phase/frequency) detector PD/PFD, and a loop filter. The PD/PFD compares the phase of an input signal and a VCO feedback signal, and generates an phase error output, which is low pass filtered by the loop filter to provide a VCO control voltage to phase lock the VCO output signal with the input signal.

[0003] FIG. 1 illustrates a PLL 10 with a VCO 12 and a phase/frequency detector (PFD) 14, and an example charge pump loop filter 20 driven by the PFD. Loop filter 20 includes a loop filter capacitor CI, and an optional secondary filter (smoothing) capacitor C2. Loop filter 20 low pass filters the PDF phase error output to provide a VCO control voltage VI .

[0004] One application of phase-locked loop control systems is for clock data recovery. In an integrated CDR, the loop filter capacitor can use 25% or more of the die area. Alternative design approaches to reducing this die area penalty are to use an external loop filter cap, or to replace an analog PLL/CDR design with a digital PLL/CDR.

SUMMARY

[0005] Described examples include apparatus and methods for a loop filter with an active discrete-level loop filter capacitor (e.g., for use in a voltage controlled oscillator), such as for clock data recovery.

[0006] In at least one example, the loop filter capacitor function is simulated by: (a) sensing an input loop filter current, and providing a corresponding sensed loop filter current; and (b) providing a VCO control voltage by generating a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current, generating a VDAC control voltage using a VDAC (voltage digital to analog converter) based on the discrete-level VDAC feedback voltage, providing the VDAC control voltage to a non-inverting input to an amplifier, and generating the VCO control voltage at a loop filter output node coupled to an inverting input to the amplifier, the VCO control voltage based on the VDAC feedback voltage, which is based on the sensed loop filter current.

[0007] According to other examples, the discrete-level VDAC feedback voltage can be generated by: incrementing and decrementing the VDAC feedback voltage based on a deviation of a voltage V2 on C2 from a voltage reference Vref based in the sensed loop filter current; and resetting the V2 voltage on C2 to Vref after each increment and decrement of the VDAC feedback voltage; such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2. According to other examples, the input loop filter current is sensed using: a current mirror with a mirror input leg including a mirror input node coupled to receive the input loop filter current, and a mirror output leg including a mirror output node to provide the sensed loop filter current, the mirror output node coupled to the VDAC feedback circuitry; and a source follower transistor included in the mirror input leg, and controlled by the VDAC circuitry to sense the input loop filter current, which is mirrored as the sensed loop filter current to the mirror output leg based on a pre-defined mirror-ratio.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIG. 1 illustrates a PLL with a VCO and phase/frequency detector, and an example charge pump loop filter, including a loop filter capacitor.

[0009] FIG. 2 is a functional illustration of replacing a loop filter capacitor with an active discrete-level loop filter capacitor according to example embodiments.

[0010] FIG. 3 illustrates an example embodiment of a loop filter with an active discrete-level loop filter capacitor for replacing a component loop filter capacitor, using VDAC circuitry to approximate the loop filter capacitor function, including sensing input loop filter current (Icp), and forcing back the appropriate VCO control voltage generated by the VDAC circuitry.

[0011] FIG. 4 illustrates an example implementation of a loop filter with an active discrete-level loop filter capacitor, including VDAC circuitry, current sense circuitry and VDAC feedback circuitry.

DETAILED DESCRIPTION OF EXAMPLE EMB ODEVIENT S

[0012] Described examples include a loop filter with active discrete-level loop filter capacitor. An example application is a loop filter for VCOs (voltage or current controlled oscillators), such as for clock data recovery systems. [0013] The terminology active discrete-level loop filter "capacitor" means an active circuit design for loop filter capacitance function that can be used to replace a component capacitor, such as illustrated in FIG. 1 (CI).

[0014] In brief overview a loop filter with an active discrete-level loop filter capacitor can be used in a VCO (such as for CDR). A loop filter capacitor function is simulated by sensing input loop filter current (such as with a current mirror and source follower in the input leg), and forcing back a loop filter (VCO) control voltage. Loop filter voltage control is provided using a VDAC with a discrete-level VDAC feedback voltage, incremented/decremented based on the sensed loop filter current. In one embodiment, the VDAC voltage is provided as the non-inverting input to an amplifier, with the inverting input providing the control voltage, forced to the VDAC feedback voltage. The VDAC feedback voltage can be provided by increment/decrement comparators based on a voltage deviation on a C2 capacitor (from a reference voltage) that receives the sensed loop filter current (effectively multiplying the C2 capacitance to provide a simulated loop filter capacitance).

[0015] FIG. 2 is a functional illustration of replacing a component loop filter capacitor CI with an active discrete-level loop filter capacitor (30) according to example embodiments.

[0016] As described hereinabove, as used in this description, the terminology active discrete-level loop filter "capacitor" means an active circuit design for loop filter capacitance function that can be used to replace a component capacitor, as described in connection with FIGS. 3 and 4. Accordingly, the active loop filter capacitor design creates, in effect a "pseudo" capacitor that provides the loop capacitor functionality, as an alternative analog capacitor design, without adopting a full digital loop filter.

[0017] FIG. 3 illustrates an example embodiment of a loop filter with an active discrete-level loop filter capacitor 300. The active discrete-level loop filter capacitor design uses VDAC (voltage digital-to-analog converter) voltage control circuitry 310, 311, 313 to approximate the loop filter capacitor function.

[0018] The loop filter capacitor function is simulated by sensing (312) input loop filter current Icp received at an input node Nl, and forcing back the appropriate VCO control voltage VI at node Nl with the VDAC voltage control circuitry. The VDAC voltage control circuitry includes VDAC circuitry 310, including a VDAC 311, and VDAC feedback circuitry 313. [0019] Current sense circuitry 312 senses input loop filter current Icp (received through Nl), and provides a corresponding sensed loop filter current 12. Current sense circuitry includes a current mirror with a source follower NMOS Ml in the mirror input leg.

[0020] The current mirror includes an input leg coupled to node Nl, and a mirror (output) leg with an output node Ncm. Source follower Ml in the current mirror input leg is source-coupled to node Nl, receiving the input loop filter current Icp.

[0021] The low-output impedance source follower Ml is controlled by the VDAC circuitry as described below. Source follower Ml senses the input loop filter current Icp at its drain, which is mirrored to the mirror output leg (based on a pre-defined mirror ratio, such as 10: 1), and output through Ncm as the sensed loop filter current 12.

[0022] The VDAC voltage control circuitry 310, 313 generates the VCO control voltage VI (Nl) based on a VDAC feedback voltage, which is based on the sensed loop filter current generated by current sense circuitry 312. VDAC voltage control circuitry includes VDAC circuitry 310, including VDAC 311, and VDAC feedback circuitry 313.

[0023] VDAC feedback circuitry 313 generates a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current, and input to the VDAC 311.

[0024] VDAC feedback circuitry 313 includes increment and decrement comparators 314 and 316 responsive to a voltage based on the sensed loop filter current 12 output from current sense circuitry 312 at the mirror output node Ncm. Increment/decrement comparators respectively generate increment/decrement signals input to INC/DEC logic 322. INC/DEC logic 322 is responsive to the increment/decrement signals from comparators 314/316 to generate the discrete-level VDAC feedback voltage.

[0025] VDAC feedback circuitry includes a capacitor C2 coupled between the current mirror output node Ncm, and a reference voltage Vref. The increment/decrement comparators generate the increment/decrement signals based on a deviation of a voltage V2 on C2 from Vref. INC/DEC logic 322 provides a reset signal to switch SI to reset V2 to Vref after each increment and decrement signal. Effectively, the loop filter capacitance of the loop filter circuitry 300 is a multiplication of the capacitance of C2.

[0026] VDAC circuitry 310 includes an amplifier 326 to provide a control input to the source follower Ml in current sense circuitry (current mirror) 322. Amplifier 326 has a noninverting input coupled to receive the VDAC feedback voltage, and an inverting input coupled to node Nl, the VCO control voltage VI . Amplifier 326 forces the VCO control voltage VI at the inverting input to be substantially equal to the VDAC feedback voltage at the non-inverting input.

[0027] Thus, the low-output impedance provided by source follower Ml (l/(Av*gm)) at the input node Nl effectively provides a "pseudo" loop filter capacitor. The capacitor function simulated by the VDAC voltage control function, including VDAC 311 and amplifier 326 providing a control voltage to source follower Ml . Loop filter input current Icp is sensed by the source follower Ml, and mirrored to provide the sensed loop filter current 12 output from Ncm. The sensed loop filter current 12 is applied across the secondary capacitor C2 (such as approximately lpF). Increment/decrement comparators 314/316 sense the deviation of V2 relative to Vref, and provide corresponding increment/decrement signals to the INC/DEC logic 322. When a positive edge of the increment/decrement signals is sensed, the INC/DEC control logic increments/decrements by lx LSB (such as approximately lmV) the VDAC feedback voltage controlling the VCO control voltage VI .

[0028] The loop filter with an active discrete-level loop filter capacitor 300 effectively provides capacitance multiplication of C2 by two factors: (a) n = /V LSB where V ttig is the delta voltage accumulated on the small capacitor C 2 ; and (b) the current mirror ration m. An example value of C 2 lpF yields approximately lOOOx reduction from InF (a representative value for a component loop filter capacitor):

[0029] FIG. 4 illustrates an example implementation of a loop filter with an active discrete-level loop filter capacitor 400, including VDAC circuitry 410, current sense circuitry 412 and VDAC feedback circuitry 413. VDAC feedback circuitry 413 is shown deconstructed as comparators 414, 416, and INC/DEC control logic 422, together generating the VDAC feedback voltage.

[0030] The loop filter with an active discrete-level loop filter capacitor according to this description can be designed as a un-clocked digital block that is low power and low current consumption (such as approximately 1mA total). It is based on a VDAC VCO voltage control architecture including approximately a lObit VDAC, inc/dec comparators, and a current-mirror. For an example CDR application with integrated loop filter capacitor, die area is significantly reduced.

[0031] In summary, a loop filter, such as for use in a VCO, is based on an active discrete-level loop filter capacitor that includes: current sense circuitry to sense an input loop filter current, and provide a corresponding sensed loop filter current; and VDAC voltage control circuitry. The VDAC control circuitry includes: VDAC circuitry including a VDAC (voltage digital-to-analog converter), and VDAC feedback circuity to generate a discrete-level VDAC feedback voltage that is incremented and decremented based on the sensed loop filter current; the VDAC circuitry to generate the VCO control voltage based on the VDAC feedback voltage, which is based on the sensed loop filter current. The VDAC circuitry can include an amplifier to provide a control input to the current sense circuitry; the amplifier having a noninverting input coupled to receive the VDAC feedback voltage, and an inverting input coupled to the VCO control voltage; such that the VCO control voltage is substantially equal to the VDAC feedback voltage. The VDAC feedback circuitry can include increment and decrement comparators responsive to a voltage based on the sensed loop filter current to respectively generate increment and decrement signals; and inc/dec logic responsive to the increment and decrement signals to generate the discrete-level VDAC feedback voltage. The VDAC feedback circuitry can further include: a capacitor C2 coupled between the output node, and a reference voltage Vref; the increment and decrement comparators to generate the increment and decrement signals based on a deviation of a voltage V2 on C2 from Vref; and reset circuitry coupled to C2 and responsive to a reset signal from the inc/dec logic to reset V2 to Vref after each increment and decrement signal; such that an effective loop filter capacitance of the loop filter circuitry is a multiplication of a capacitance of C2. The current sense circuitry can include: a current mirror with a mirror input leg including a mirror input node coupled to receive the input loop filter current, and a mirror output leg including a mirror output node to provide the sensed loop filter current, the mirror output node coupled to the VDAC feedback circuitry; and a source follower transistor included in the mirror input leg, and controlled by the VDAC circuitry to sense the input loop filter current, which is mirrored as the sensed loop filter current to the mirror output leg based on a pre-defined mirror-ratio.

[0032] Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.