LOW DROP-OUT LINEAR VOLTAGE REGULATOR

WIPO Patent Application WO/2018/129967

A1

A low drop-out linear voltage regulator, comprising an error amplifier (10), a power transistor (M P), a dynamic Miller compensation network (20), and a controller (30), wherein a source electrode of the power transistor (M P) is configured to be connected to a power supply (V IN), a gate electrode of the power transistor (M P) is connected to an output end of the error amplifier (10), and a drain electrode of the power transistor (M P) is connected to an output end of the low drop-out linear voltage regulator. The low drop-out linear voltage regulator detects, by means of the controller, a current of the output end of the low drop-out linear voltage regulator, generates, according to the current, a control signal of the dynamic Miller compensation network to control ON and OFF of a second resistance-capacitance branch (22) in the dynamic Miller compensation network, and dynamically changing, according to an external load of the low-drop-out linear voltage regulator, the access number of second capacitors (C1) in the dynamic Miller compensation network, so that the low drop-out linear voltage regulator uses a large compensation capacitor to achieve a good stability when a load current is low, and uses a small compensation capacitor to achieve fast response and wide bandwidth when the load current is high.

ZHAN CHENCHANG (CN)
JI YONGXIONG (CN)
CAI GUIGANG (CN)
ZHAO SHUANGXING (CN)

PCT/CN2017/106283

July 19, 2018

October 16, 2017

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UNIV SOUTH SCIENCE & TECHNOLOGY CHINA (CN)

G05F1/56

CN106774578A	2017-05-31
CN101369161A	2009-02-18
CN104407662A	2015-03-11
CN105005351A	2015-10-28
CN102707754A	2012-10-03
US20080174289A1	2008-07-24

BEYOND ATTORNEYS AT LAW (CN)

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