The present disclosure relates to a low power DC-DC converter, and in particular to a boost converter.

Applications of the converter include, but are not limited to, stepping up a very low voltage from an energy harvesting device to a useful supply voltage.

An energy harvesting device is a device that generates electrical energy from an external or environmental source. Examples include radio frequency (RF) energy harvesters that collect radio frequency energy from ambient or dedicated sources, and a micro-thermoelectric generator that collects heat. A useful supply voltage is a voltage that is adequate to power a specific electronic circuit or device that is coupled (wired or wirelessly) with the energy harvesting device. The magnitude of the supply voltage that is useful will depend on the specific device in question.

One example application area is in the field of body sensor nodes (BSNs). These promise to provide significant benefits to the healthcare domain by enabling continuous monitoring, actuation, and logging of patient bio-signal data, which can help medical personnel to diagnose, prevent, and respond to various illnesses such as diabetes, asthma, and heart attacks. Though they show great potential, BSNs have many technical challenges that impede their widespread adoption including node operating lifetime, small form factor for wearability, and affordable cost. Conventional wireless sensors use batteries, limiting node lifetime and reducing user compliance due to the requirement for charging or replacing batteries.

Other forms of wearable technology promise significant benefits but are held back by similar technical challenges. A DC-DC charge pump is required in order to step up an energy harvesting device's output voltage. However existing converters require mechanical start-up circuits or pre-charged batteries in order to start-up at very low voltages. According to the present disclosure there is provided a DC-DC converter comprising an oscillator with a charge pump; and an energy harvesting device comprising such a DC-DC converter.

Optionally, the DC-DC converter is a boost converter.

Optionally, the oscillator is a low voltage oscillator.

A low voltage oscillator may have a supply voltage of around IV or less..

Optionally, the oscillator is a differential oscillator.

Optionally, the oscillator comprises one or more source degenerated transistors. The source degeneration impedance may comprise an LC (inductor and capacitor) tank that help in reducing the minimum supply voltage.

Optionally, the charge pump comprises a plurality of charge pump stages.

Further aspects of the disclosure may be derived from the detailed description that follows below.

According to a further aspect of the disclosure there is provided a DC-DC converter substantially as herein described with reference to figures 1-5; and with reference to figures 6-13.

The disclosure will be described, by way of example only, with reference to the

accompanying drawings, in which:

Figure 1 shows a DC-DC converter according to an embodiment of the disclosure; Figure 2 shows a low voltage differential oscillator which may form part of the converter of figure 1;

Figure 3 shows out of phase clock signals CLK and CLK_ generated by the oscillator of figure 2;

Figure 4 shows a charge pump stage which may form part of the converter of figure 1; Figure 5 shows a circuit architecture of a DC-DC converter;

Figure 6 shows an example system architecture of a body sensor node;

Figure 7 shows a die photograph of a DC-DC converter according to an embodiment of the disclosure;

Figure 8 shows the percentage distribution of chip samples used for testing versus a minimum input voltage;

Figure 9 shows a transient of output voltage of the DC-DC converter of figure 3 at 96mV input voltage;

Figure 10 illustrates a clock voltage from generated by an oscillator of the converter of figure 7; Figure 11 shows converter output voltage and the power consumption versus the input voltage;

Figure 12 shows an output voltage in steady state condition at the edge of the input voltage range; and

Figure 13 shows how a minimum supply voltage deceases by augmentation of a

degeneration capacitance in an oscillator circuit. Figure 1 illustrates the general concept of the disclosure. A voltage VEH from an energy harvesting device is input to a DC-DC converter 100 which provides an output voltage VOUT stored at an output capacitor CLOAD for powering a device.

The DC-DC converter 100 comprises an oscillator together with a charge pump. The oscillator is preferably a differential oscillator to provide a double output peak voltage. The oscillator (differential or otherwise) may also preferably be a low voltage oscillator. The charge pump may comprise a plurality of charge pump stages, which may be connected in series with the output of an earlier stage providing the input for a later stage. Each stage may operate to pump a unit of charge from its relatively lower voltage input to its relatively higher voltage output with each transition of a clock signal.

As an example, the DC-DC converter 100 may step up an input voltage of 80mV to an output voltage of 400 to 1000 mV. The output impedance may be proportional to the number of charge pump stages.

Figure 2 shows an example of a low voltage differential oscillator which may be used as part of the converter 100. It comprises a cross coupled N MOS transistors pair (Ml, M2), with a degeneration impedance on the transistors' sources provided by an LC tank, and a resonant LC load on the transistors' drains.

The oscillator is powered by an energy harvesting device such as a thermoelectric generator, receiving a supply voltage (usually a positive supply, VDD), which may be a few tens of millivolts, in this example 80mV. The differential structure generates out of phase signals CLK and CLK_, as shown in figure 3.

Source degenerations of transistors allow low voltage operation. This is demonstrated by the analytical analysis reported below. I n particular Figure 13 shows how the minimum supply voltage deceases by augmenting the degeneration capacitance CI.

Figure 4 shows an example charge pump stage which may be used as part of the converter 100. A plurality of these stages may be used, with the output OUT shown in figure 4 providing the input I N for another stage. The CLK peak to peak amplitude is about the double of the supply voltage (about 180mV in this embodiment). The output voltage of the stage is roughly equal to the sum of VPK (peak to peak oscillation amplitude) and VDD (supply voltage).

Figure 5 shows an embodiment of a DC-DC converter comprising a low voltage differential oscillator and a charge pump. Two charge pump stages are illustrated but any number can be provided. The output voltage, VOUT, is given by: VOUT = VDD + N*V _PK Ccpl/(Ccpl + CS) - IOUT* OUT

While ( ROUT )= N/(f*(Ccpl+ Cs))

Ccpl is the capacitance included in each stage of the charge pump, Cs is the parasitic capacitance between the source of the N MOS and PMOS transistors node and the ground in the charge pump. It includes the parasitic capacitances of the terminals of each charge pump capacitor to the substrate, the parasitic capacitances of interconnection lines and the source to substrates parasitic capacitances of transistors. The parasitic capacitance is about 2.5 pF in this embodiment. N represents the number of charge pump stages. is layout has been shown to provide the following characteristics

With this architecture there is no need to use an external voltage or mechanical switches to generate a start-up voltage. A body sensor node (BSN) is one example of an energy harvesting device. A BSN can be powered by a combination of energy harvested from multiple sources, for example from human body heat using a micro-Thermo-Electric Generator (μΤΕ6) and energy recovered by a RF harvester.

As the μΤΕ6 provides only few tens of mV at its output, it is important to provide an ultra- low power DC-DC converter able to operate at very low voltage. Figure 6 illustrates an example system architecture of a body sensor node. The RF energy harvester comprises an antenna (which may for example be a 50-Ω dipole-like antenna), and an RF-DC rectifying circuit. Both rectifier and antenna may work at suitable frequency bands, for example, 866.5 MHz in the European UHF RFID band. Other frequencies within this band may be used, or frequencies in other appropriate RF standards and conventions. The antenna harvests and converts into usable energy for its operation the same RF power transmitted by the reader for the sensor interrogation. The rectified DC voltage is used to power up an ultra-low power micro-controller and the RFI D chip.

Here, the micro-controller ^controller) enables the supply of the sensor interface, samples the output of the analog front end (AFE) of the sensor, and transfers the data to a UHF RFI D chip for the transmission. The analog front-end of the sensor includes a set of analog signal conditioning circuitry that uses operational amplifiers, filters providing a configurable and flexible electronics functional block, needed to interface with a variety of sensors. Any type of sensor may be used. To give one non-limiting example, the sensors may be in the healthcare domain providing significant benefits by enabling continuous monitoring, actuation, and logging of patient bio-signal data, which can help medical personnel to diagnose, prevent, and respond to various illnesses such as diabetes, asthma, and heart attacks. Such sensors may comprise (for example) motion sensors, photoplethysmographic sensors, temperature sensors, or acoustic sensors. The AFE is supplied by the energy harvested by a μΤΕ6. The μΤΕ6 is intended to be used in environments with low

temperature differentials (i.e., the human body in a room temperature setting). It provides an output voltage (stored in the CTEG capacitor), which in a specific embodiment is 430mV when the temperature gradient is 40°C. However, the surrounding air presents a large thermal resistance that dramatically reduces the effective temperature gradient across the thermopiles composing the μΤΈ-G, further limiting the voltage available at the μΤΕ6 output. This voltage is only tens of mV, requiring a high conversion ratio DC-DC converter to generate a usable supply voltage. The output of the DC-DC converter is enabled by the micro-controller after an appropriate time in order to ensure that the voltage has reached its maximum value.

Figure 5 shows a circuit architecture of a DC-DC converter which is suitable for use with the circuit of Figure 6 but can also be applied in any other context where a very low voltage needs to be stepped up to a useful supply voltage. The converter comprises an oscillator and a charge pump. The charge pump may comprise a plurality of stages. I n this embodiment, the converter comprises an ultra-low voltage LC oscillator and a five stage charge pump. The , L2, L3, L4 inductors and C capacitor may be provided as off-chip components if desired.

As the DC-DC converter input voltage, Vdd, corresponds to the oscillator supply voltage, a low voltage oscillator providing sufficiently large oscillation should be supplied in order to obtain very low voltage operation. An LC resonant circuit with cross coupled MOS transistors may be used at low voltage. As a circuit with minimum configuration, this oscillator is suitable for low voltage operation with only one MOS transistor between ground and power supply. However, if the supply voltage is lower than a MOS transistor threshold, VTH, the oscillation becomes difficult. As a consequence, to reduce the start-up voltage the ultra-low voltage oscillator shown in Fig. 5 can be used. With respect of the LC resonant circuit with cross coupled MOS transistors, the proposed oscillator has a degeneration impedance on the sources of the NMOS transistors that helps in reducing the minimum required supply voltage. This has been demonstrated by the following analytical analysis: By imposing the start-up condition (i.e. the condition required by the oscillator to start working) the following equation is obtained : where g _m is the transconductance of the NMOS transistors, ωο is the resonance frequency of the oscillator, and Qi is the quality factor of the and L2 inductors. At the low voltage supplied to the oscillator by the external device (such as μΤΈ-G) the N MOS transistors operate in weak inversion. Therefore, the transconductance of the NMOS transistors is given by:

(Eqn 2) where l _s is the reverse saturation current, n is the slope factor of Mi and M2, V _t is the thermal voltage, and Vdd is the supply voltage. The resonance frequency, ωο, depends on the resonant load at the drains of Mi and M2. It is given by:

GDn =

ii -(5-(C _cpl +C _par )) ^L i- ⁵ - ^C cpi

(Eqn 3) where C _par is the parasitic capacitance including the parasitic capacitances of the terminals of each charge pump capacitor to the substrate, the parasitic capacitances of

interconnection lines and the pad capacitances. By combining equations (1), (2) and (3), the minimum input voltage, Vdd,min, is shown to be:

(Eqn 4) Figure 13 shows that the Vdd,min decreases when a degenerated CI capacitance is increased, demonstrating the source degeneration impedance helps in reducing the minimum required supply voltage.

Table I reports the values of the circuit components and the values of l _s , and n of Mi and M2, which have been obtained by simulations and optimizations.

TABLE I . VALUES OF THE CIRCUITS COMPONENTS AND N MOS PARAMETERS

The circuit is symmetrical, therefore L4=L3, Ccpl=Ccp2, L1=L2 and C1=C2, and the slope factor n is common to all the transistors. According to equation 4, the resulting minimum voltage at the DC-DC converter input, Vdd,min, is 91mV. However, both l _s and n undergo the process spread. Table I I reports the values of l _s and n at the process corners and the respective values of Vdd,min obtained by equation (4). TABLE I I . VALUES OF V _DD , _MI N AT THE PROCESS CORNERS

Process corner Is (nA) n Vdd,min (mV)

typical 53.4 1.33 91 fast 81.3 1.23 72

slow 24.5 1.41 124

Both Is and n have a strong dependency on the temperature. However, the sensor node is supposed to work close to the human body. Therefore, the working temperature is kept around 36°C with limited variations around this value. As a consequence, the dependency of the start-up voltage on the temperature can be waived.

The peak-to-peak oscillation amplitude, VCLK, is the double of the supply voltage, i.e.:

(Eqn 5)

The oscillator provides the clock driving the C _cp i and C _CP 2 capacitances of each stage of the charge pump. The output voltage, V _ou t, of the charge pump with k stages is given by: k

Vout = Vdd ^■ ( (1 - + 2 ^{■ Ccv} k ^■ Y (1 - £) ^k+1 - ^j

7 = 1

(Eqn 6) where £ is the charging error due to the finite resistances of the MOS transistors. The charging error, £, is calculated as follows:

TCLK

g = e ⁴ " ^7I''R 5wCcpi _¾ i—

(Eqn 7) where Rsw is the resistance of the MOS transistors and Τ κ is the clock period. According to equation 7, in order to reduce the charging error £, Rsw and C _cp i should be designed as small as possible, while and k should be designed as large as possible. However Rsw is limited by the reduce supplied voltage, C _p i has a lower limit due to the parasitic

capacitances C _PAR , while augmenting the number of stages k increases the power consumption. Therefore, it may be chosen to have a very large and L2 inductors by using off-chip components.

The number of stages k has been calculated in order to reach a 500mV output voltage starting from the minimum input voltage required by the oscillator (91mV). Therefore a conversion ratio higher than 5 is required. By adopting a 5 stages charge pump an ideal gain of 11 can be reached. However, due to the losses caused by the parasitic capacitances and the charging error, a effective convertion ratio slightly higher than 5 is obtained by simulations.

An embodiment of the DC-DC converter has been designed in a 0.18μιη CMOS technology. Figure 7 shows the die photograph. Chip sizes are 1130μιη x 533μιη. The output

capacitance comprises the parallel of the integrated capacitance CLI of lOOpF (implemented by an NMOS cap), and an off chip capacitance C of ΙμΡ.

Ten chip samples were available for measurements. Figure 8 shows the percentage distribution of the chip samples versus the minimum input voltage. The 60% of the available samples have a minimum input voltage in the 90mV-99mV range, while the mean value is 96mV. This value is close to the calculated one. Measurements here reported are relative to the sample with a minimum input voltage equal to 96mV as the mean one. Figure 9 shows the transient of the output voltage. After about 15s transient the output voltage reaches 500mV at the steady state. This transient time decreases at the increasing of the input voltages. For input voltages larger than 200mV, it is in the range of few milliseconds. Figure 10 shows the clock voltage. The peak-to-peak clock amplitude is 195mV _pp , which is close to the double of the input voltage, as calculated by equation 5. Figure 11 shows the output voltage (upper graph) and the power consumption (lower graph) versus the input voltage. At the increasing of input voltage, the MOS transistors of charge pump pass from sub-threshold to linear operating region, therefore the power consumption increases considerably (from 1μ\Λ/ at 96mV Vdd, up to 50μ\Λ/ at 400mV Vdd).

Figure 12 shows the output voltage in steady state condition at the edges of the input voltage range (96mV, and 400mV). At 96mV Vdd, the output voltage is equal to 500mV with a lOmVpp ripple. At 400mV Vdd, the output voltage is 1.1V, while the ripple reaches its maximum value of 70mV _pp .

Output ripple can be reduced by increasing the off chip output capacitance C , at the cost of a slower transient of the output voltage to reach the steady state value.

The DC-DC converter of the present disclosure has better minimum input voltage and power consumption than existing solutions, and furthermore does not need mechanical switching or pre-charged external batteries to start-up the oscillator.

An ultra-low power DC-DC converter has been disclosed. One example use case is the embedding into body sensor nodes. The converter may be used to step-up the voltage at the output of a μΤΕ6. The specific example disclosed herein features a 96mV minimum input voltage while consuming 1μ\Λ/. The output voltage ranges between 0.5V and 1.1V. These results compare favourably as compared with existing solutions in terms of minimum input voltage and power consumption. Various improvements and modifications can be made to the above without departing from the scope of the disclosure.