Title:
LOW-POWER QUARTER ROUND OPERATOR
Document Type and Number:
WIPO Patent Application WO/2024/090770
Kind Code:
A1
Abstract:
The present invention relates to a low-power quarter round operator, which is provided to reduce power consumption of a quarter round operator by processing a quarter round operation used in stream ciphers at high speed by using hardware, dividing an addition unit into a plurality of sub-addition units, and suppressing the occurrence of glitches in the output of each sub-addition unit. That is, a series of combinational logic circuits for the quarter round operation are configured to be segmented into certain bit units to form a pipeline in certain stages, and thus, there is an advantage that processing speed is increased by the segmented bit units and a pipeline stage but glitches are not propagated.
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Inventors:
KIM JAMES JONGMAN (KR)
SON CHANG IL (KR)
SON CHANG IL (KR)
Application Number:
PCT/KR2023/013075
Publication Date:
May 02, 2024
Filing Date:
September 01, 2023
Export Citation:
Assignee:
SOTERIA INC (KR)
International Classes:
H04L9/06; G06F5/01; G06F7/503; G06F9/30
Foreign References:
| KR20190115408A | 2019-10-11 | |||
| US20180212761A1 | 2018-07-26 | |||
| KR100901697B1 | 2009-06-08 | |||
| EP2442482A1 | 2012-04-18 | |||
| KR20060042791A | 2006-05-15 |
Attorney, Agent or Firm:
KIM, Kyeoun Soo (KR)
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