Title:
MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/074011
Kind Code:
A1
Abstract:
Disclosed are a manufacturing method for a semiconductor structure and a semiconductor structure. The manufacturing method for the semiconductor structure comprises: providing a first chip, a second chip and a third chip; respectively bonding the second chip and the third chip to the front surface and the back surface of the first chip so as to form a chip module; and forming sealing layers on side surfaces of the second chip and the third chip, the sealing layers further covering part of the front surface and part of the back surface of the first chip, and the areas of the front and back surfaces of the second chip and the third chip being all smaller than the areas of the front and back surfaces of the first chip.
Inventors:
PAN YING (CN)
Application Number:
PCT/CN2023/081421
Publication Date:
April 11, 2024
Filing Date:
March 14, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/60
Foreign References:
| CN112542378A | 2021-03-23 | |||
| CN104051337A | 2014-09-17 |
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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