MEMORY AND DATA WRITING METHOD - HUAWEI TECH CO LTD

Title:

MEMORY AND DATA WRITING METHOD

Document Type and Number:

WIPO Patent Application WO/2018/232766

Kind Code:

A1

Abstract:

A memory (300) and a data writing method. The memory (300) comprises a memory cell array (310) and a controller (320). The memory cell array (310) comprises M rows × N columns of memory cells, M word lines, and N bit line pairs. Each of the N bit line pairs comprises a bit line and a source line. A memory cell located in an i th row of the memory cell array (310) is connected to an i th word line of the M word lines. The memory cells in a j th column of the memory cell array (310) are connected in parallel between the bit line and the source line of a j th bit line pair of the N bit line pairs. After acquiring Q rows of data to be written to Q rows of memory cells of the memory cell array (310), the controller (320) writes a first value into the j th column of memory cells in P columns of memory cells. The controller (320) then determines a row to be written among the Q rows of data, and writes, in parallel, a second value to the memory cells of the row to be written in the j th column of memory cells. The memory (300) improves efficiency of data writing.

Inventors:

LONGNOS FLORIAN (CN)
IPEK ENGIN (US)
XIAO SHIHAI (CN)

Application Number:

PCT/CN2017/089871

Publication Date:

December 27, 2018

Filing Date:

June 23, 2017

Export Citation:

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Assignee:

HUAWEI TECH CO LTD (CN)

International Classes:

G11C16/06

Foreign References:

CN1484250A	2004-03-24
CN101965638A	2011-02-02
CN103903650A	2014-07-02
US20110299330A1	2011-12-08

Other References: