Title:
MEMORY DEVICE, AND METHOD FOR MANUFACTURING MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/106234
Kind Code:
A1
Abstract:
A memory device according to an embodiment comprises: a first transistor including a bit line over a substrate, a first semiconductor layer between the substrate and the bit line, and a first gate electrode opposing a side surface of the first semiconductor layer via a first gate insulating layer; a second transistor including a first memory element between the first transistor and the substrate, a first word line connected to the first gate electrode, a second semiconductor layer between the substrate and the bit line, and a second gate electrode opposing a side surface of the second semiconductor layer via a second gate insulating layer; a second memory element between the second transistor and the substrate; and a second word line adjacent to the first word line in a direction parallel to the surface of the substrate and connected to the second gate electrode. The second semiconductor layer is adjacent to the first semiconductor layer in a second direction parallel to the surface of the substrate and transverse to the first direction.
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Inventors:
OKAJIMA MUTSUMI (JP)
INABA TSUNEO (JP)
MASHITA HIROMITSU (JP)
INABA TSUNEO (JP)
MASHITA HIROMITSU (JP)
Application Number:
PCT/JP2020/007831
Publication Date:
June 03, 2021
Filing Date:
February 26, 2020
Export Citation:
Assignee:
KIOXIA CORP (JP)
International Classes:
H01L27/108; H01L21/8242
Domestic Patent References:
| WO2014065038A1 | 2014-05-01 | |||
| WO2014084006A1 | 2014-06-05 |
Foreign References:
| JP2015111663A | 2015-06-18 | |||
| JP2017168623A | 2017-09-21 |
Attorney, Agent or Firm:
KURATA, Masatoshi et al. (JP)
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