Title:
MEMORY DEVICE USING SEMICONDUCTOR ELEMENT
Document Type and Number:
WIPO Patent Application WO/2023/067686
Kind Code:
A1
Abstract:
This memory device is provided with a page formed from multiple memory cells arranged in columns on a substrate, and sets, during a page write operation, the voltage of a channel semiconductor layer to a first data retention voltage by controlling voltages to be applied to a first gate conductor layer, a second gate conductor layer, a first impurity region, and a second impurity region of each of the memory cells included in the page. During a page erase operation, the device sets the voltage of the channel semiconductor layer to a second data retention voltage which is lower than the first data retention voltage by controlling the voltages to be applied to the first impurity region, the second impurity region, the first gate conductor layer, and the second gate conductor layer. At a second time point when time has passed from the first time point, the device carries out a memory re-erase operation of a semiconductor matrix in the page where the voltage of the channel semiconductor layer was equal to the second data retention voltage at the first time point, and carries out a first refresh operation to return the voltage of the channel semiconductor layer substantially to the second data retention voltage. At a third time point when time has passed from the second time point, the device carries out a memory rewrite operation of a semiconductor matrix in the page where the voltage of the channel semiconductor layer was equal to the first data retention voltage at the first time point, and carries out a second refresh operation to return the voltage of the channel semiconductor layer substantially to the first data retention voltage.
Inventors:
SAKUI KOJI (JP)
HARADA NOZOMU (JP)
HARADA NOZOMU (JP)
Application Number:
PCT/JP2021/038588
Publication Date:
April 27, 2023
Filing Date:
October 19, 2021
Export Citation:
Assignee:
UNISANTIS ELECT SINGAPORE PTE (SG)
SAKUI KOJI (JP)
HARADA NOZOMU (JP)
SAKUI KOJI (JP)
HARADA NOZOMU (JP)
International Classes:
G11C16/04; G11C11/401; H01L27/10
Foreign References:
| JP2008218556A | 2008-09-18 | |||
| JP2006080280A | 2006-03-23 |
Attorney, Agent or Firm:
TANAKA Shinichiro et al. (JP)
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