Title:
MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/101208
Kind Code:
A1
Abstract:
A memory device according to the present invention may comprise: a memory cell array in which memory cells are connected in matrix form to word lines and bit lines; a plurality of mergers connected in series to transfer data that is read from a selected memory cell among the memory cells included in the memory cell array and is transformed into one of a direct current form or a pulse form; and a sorter that synchronizes an edge of first output data, output by one of the plurality of mergers, with an edge of a control pulse, thereby delaying the edge of the first output data. First data, which is either data bit "0" or data bit "1", can be input to the mergers in the form of a direct current of first logic, and second data, which is another piece of data, can be input to the mergers in the form of a pulse that changes from the first logic to the second logic and back to the first logic. When the first data is input, the sorter can allow the first data to pass as-is and output the first data as second output data in the form of a direct current of the first logic. When a first edge that changes from the second logic to the first logic is input, the sorter can delay the first edge by synchronizing the same with a rising edge or falling edge of the control pulse, and output the first edge as the second output data.
Inventors:
KIM YOUNG SEUNG (KR)
YOO SEUNG MOON (KR)
JUNG MIN CHUL (KR)
YOO SEUNG MOON (KR)
JUNG MIN CHUL (KR)
Application Number:
PCT/KR2020/016166
Publication Date:
May 27, 2021
Filing Date:
November 17, 2020
Export Citation:
Assignee:
METACNI CO LTD (KR)
International Classes:
G11C7/22; G11C7/06; H03K5/1534
Foreign References:
| US20140355358A1 | 2014-12-04 | |||
| JP2008130155A | 2008-06-05 | |||
| JP2012113792A | 2012-06-14 | |||
| US20110228614A1 | 2011-09-22 | |||
| KR100955285B1 | 2010-04-30 |
Attorney, Agent or Firm:
ROYAL PATENT & LAW OFFICE (KR)
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