Title:
MEMORY DEVICES HAVING VERTICAL TRANSISTORS AND METHODS FOR FORMING THE SAME
Document Type and Number:
WIPO Patent Application WO/2023/028890
Kind Code:
A1
Abstract:
In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a peripheral circuit. The second semiconductor structure includes an array of memory cells and a plurality of bit lines coupled to the memory cells and each extending in a second direction perpendicular to the first direction. Each of the memory cells includes a vertical transistor extending in a first direction, and a storage unit coupled to the vertical transistor. The vertical transistor includes a semiconductor body extending in the first direction, and a gate structure in contact with two opposite sides of the semiconductor body in the second direction. A respective one of the bit lines and a respective storage unit are coupled to opposite ends of each one of the memory cells in the first direction. The array of memory cells is coupled to the peripheral circuit across the bonding interface.
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Inventors:
ZHU HONGBIN (CN)
LIU WEI (CN)
WANG YANHONG (CN)
JIANG NING (CN)
LIU WEI (CN)
WANG YANHONG (CN)
JIANG NING (CN)
Application Number:
PCT/CN2021/115820
Publication Date:
March 09, 2023
Filing Date:
August 31, 2021
Export Citation:
Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
G11C5/00; H01L21/02; H01L29/78
Foreign References:
| CN110476209A | 2019-11-19 | |||
| CN112997319A | 2021-06-18 | |||
| CN112470274A | 2021-03-09 | |||
| CN108807660A | 2018-11-13 | |||
| US20160049406A1 | 2016-02-18 |
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
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