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Title:
METHOD, APPARATUS AND COMPUTER PROGRAM FOR TDD REPEATER
Document Type and Number:
WIPO Patent Application WO/2019/233580
Kind Code:
A1
Abstract:
An apparatus comprising means for: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

Inventors:
MAIER SIMONE (DE)
SCHLESINGER HEINZ (DE)
Application Number:
PCT/EP2018/064953
Publication Date:
December 12, 2019
Filing Date:
June 07, 2018
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NOKIA SOLUTIONS & NETWORKS OY (FI)
International Classes:
H04B7/155
Foreign References:
US20050286448A12005-12-29
EP3008828B12017-08-09
US20050254442A12005-11-17
CN101471723A2009-07-01
Other References:
None
Download PDF:
Claims:
Claims

1 . An apparatus comprising means for:

receiving a first signal;

receiving a second signal;

determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and

determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

2. An apparatus according to claim 1 comprising means for:

causing the first signal or the second signal to be transmitted.

3. An apparatus according to claim 1 or claim 2 wherein the logic circuit comprises at least one flip flop circuit.

4. An apparatus according to claim 3, wherein the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

5. An apparatus according to claim 3 or claim 4, wherein the first flip flop circuit and second flip flop circuit comprises an edge-triggered D-type flip-flop circuit.

6. An apparatus according to any preceding claim, wherein the apparatus comprises means for:

detecting the power of the first signal and detecting the power of the second signal.

7. An apparatus according to claim 6, wherein the means for detecting the power of the first signal and the means for detecting the power of the second signal comprises a radio frequency envelop detector.

8. An apparatus according to any of claims 1 to 7, wherein the first signal is an uplink signal and the second signal is a downlink signal.

9. A computer readable medium comprising program instructions for causing an apparatus to perform at least the following: receiving a first signal;

receiving a second signal;

determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and

determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

10. A method comprising:

receiving a first signal;

receiving a second signal;

determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and

determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

1 1 . A method according to claim 10 comprising:

causing the first signal or the second signal to be transmitted.

12. A method according to claim 10 or claim 1 1 , wherein the logic circuit comprises at least one flip flop circuit.

13. A method according to claim 12, wherein the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

14. A method according to claim 12 or claim 13, wherein the first flip flop circuit and second flip flop circuit comprises an edge-triggered D-type flip-flop circuit.

15. A method according to any of claims 10 to 14, comprising detecting the power of the first signal and detecting the power of the second signal.

16. A method according to claim 15, wherein the detecting the power of the first signal and the detecting the power of the second signal are performed by a radio frequency envelop detector.

17. A method according to any of claims 10 to 16, wherein the first signal is an uplink signal and the second signal is a downlink signal.

18. An apparatus comprising:

at least one processor;

at least one memory including computer program code;

wherein the at least one memory and computer program code is configured, with the at least one processor, to cause the apparatus at least to:

receive a first signal;

receive a second signal;

determine if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and

determine if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

19. A communications system comprising:

at least one base station ;

at least one user equipment; and

at least one apparatus comprising means for:

receiving a first signal from the at least one base station;

receiving a second signal from the at least one user equipment;

determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted to the at least one user equipment; and

determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted to the at least one base station.

Description:
METHOD, APPARATUS AND COMPUTER PROGRAM FOR TDD REPEATER

Field

The present application relates to a method, apparatus, system and computer program and in particular but not exclusively to a 5G milimeter-wave TDD repeater in fixed wireless access application.

Background

A communication system can be seen as a facility that enables communication sessions between two or more entities such as user terminals, base stations and/or other nodes by providing carriers between the various entities involved in the communications path. A communication system can be provided for example by means of a communication network and one or more compatible communication devices. The communication sessions may comprise, for example, communication of data for carrying communications such as voice, video, electronic mail (email), text message, multimedia and/or content data and so on. Non limiting examples of services provided comprise two-way or multi-way calls, data communication or multimedia services and access to a data network system, such as the Internet.

In a wireless communication system at least a part of a communication session between at least two stations occurs over a wireless link. Examples of wireless systems comprise public land mobile networks (PLMN), satellite based communication systems and different wireless local networks, for example wireless local area networks (WLAN). The wireless systems can typically be divided into cells, and are therefore often referred to as cellular systems.

A user can access the communication system by means of an appropriate communication device or terminal. A communication device of a user may be referred to as user equipment (UE) or user device. A communication device is provided with an appropriate signal receiving and transmitting apparatus for enabling communications, for example enabling access to a communication network or communications directly with other users. The communication device may access a carrier provided by a station, for example a base station of a cell, and transmit and/or receive communications on the carrier. The communication system and associated devices typically operate in accordance with a given standard or specification which sets out what the various entities associated with the system are permitted to do and how that should be achieved. Communication protocols and/or parameters which shall be used for the connection are also typically defined. One example of a communications system is UTRAN (3G radio). Other examples of communication systems are the long-term evolution (LTE) of the Universal Mobile Telecommunications System (UMTS) radio-access technology and so-called 5G or New Radio (NR) networks. NR is being standardized by the 3rd Generation Partnership Project (3GPP).

Summary

According to a first aspect, there is provided an apparatus comprising means for: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

In some embodiments, the apparatus comprises means for: causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit.

In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit.

In some embodiments, the apparatus comprises means for: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the means for detecting the power of the first signal and the means for detecting the power of the second signal comprise a radio frequency envelop detector. In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

According to a second aspect, there is provided a computer readable medium comprising program instructions for causing an apparatus to perform at least the following: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

In some embodiments, apparatus is caused to perform: causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit.

In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit.

In some embodiments, the apparatus is caused to perform: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the detecting the power of the first signal and the detecting the power of the second signal are performed by a radio frequency envelop detector.

In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

According to a third aspect, there is provided a non-transitory computer readable medium comprising program instructions for causing an apparatus to perform at least the following: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

In some embodiments, apparatus is caused to perform: causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit.

In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit.

In some embodiments, the apparatus is caused to perform: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the detecting the power of the first signal and the detecting the power of the second signal are performed by a radio frequency envelop detector.

In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

According to a fourth aspect, there is provided a method comprising: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

In some embodiments, the method comprises causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit. In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit.

In some embodiments, the method comprises: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the detecting the power of the first signal and the detecting the power of the second signal are performed by a radio frequency envelop detector.

In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

According to a fifth aspect, there is provided an apparatus comprising: at least one processor; and at least one memory including computer program code; the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to perform: receiving a first signal; receiving a second signal; determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted; and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

In some embodiments, the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to perform: causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit.

In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit. In some embodiments, the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to perform: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the detecting the power of the first signal and the detecting the power of the second signal are performed by a radio frequency envelop detector.

In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

According to a sixth aspect there is provided a communications system comprising at least one base station, at least one user equipment and at least one apparatus comprising means for receiving a first signal from the at least one base station, receiving a second signal from the at least one user equipment, determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted to the at least one user equipment and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted to the at least one base station.

In some embodiments, the apparatus comprises means for: causing the first signal or the second signal to be transmitted.

In some embodiments, the logic circuit comprises at least one flip flop circuit.

In some embodiments, the logic circuit comprises a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input.

In some embodiments, the first flip flop circuit and second flip flop circuit comprises an edge- triggered D-type flip-flop circuit.

In some embodiments, the apparatus comprises means for: detecting the power of the first signal and detecting the power of the second signal.

In some embodiments, the means for detecting the power of the first signal and the means for detecting the power of the second signal comprise a radio frequency envelop detector. In some embodiments, the first signal is an uplink signal and the second signal is a downlink signal.

In the above, many different embodiments have been described. It should be appreciated that further embodiments may be provided by the combination of any two or more of the embodiments described above.

Description of Figures

Embodiments will now be described, by way of example only, with reference to the accompanying Figures in which:

Figure 1 shows a schematic diagram of an example communication system comprising a base station and a plurality of communication devices;

Figure 2 shows a schematic diagram of an example mobile communication device;

Figure 3 shows a schematic diagram of an example control apparatus;

Figure 4 shows a block diagram of a repeater in accordance with an embodiment;

Figure 5 shows a block diagram of a logic circuit in accordance with an embodiment;

Figure 6 shows a block diagram of a repeater in accordance with an embodiment;

Figure 7 shows a schematic diagram of a system comprising repeaters in accordance with an embodiment;

Figure 8 shows a block diagram of a test setup to evaluate performance of TDD switching logic; and

Figure 9 shows a measurement result of a test setup.

Detailed description

Before explaining in detail the examples, certain general principles of a wireless communication system and mobile communication devices are briefly explained with reference to Figures 1 to 3 to assist in understanding the technology underlying the described examples.

In a wireless communication system 100, such as that shown in figure 1 , mobile communication devices or user equipment (UE) 102, 104, 105 are provided wireless access via at least one base station or similar wireless transmitting and/or receiving node or point. Base stations are typically controlled by at least one appropriate controller apparatus, so as to enable operation thereof and management of mobile communication devices in communication with the base stations. The controller apparatus may be located in a radio access network (e.g. wireless communication system 100) or in a core network (CN) (not shown) and may be implemented as one central apparatus or its functionality may be distributed over several apparatus. The controller apparatus may be part of the base station and/or provided by a separate entity such as a Radio Network Controller. In Figure 1 control apparatus 108 and 109 are shown to control the respective macro level base stations 106 and 107. The control apparatus of a base station can be interconnected with other control entities. The control apparatus is typically provided with memory capacity and at least one data processor. The control apparatus and functions may be distributed between a plurality of control units. In some systems, the control apparatus may additionally or alternatively be provided in a radio network controller.

In Figure 1 base stations 106 and 107 are shown as connected to a wider communications network 1 13 via gateway 1 12. A further gateway function may be provided to connect to another network.

The smaller base stations 1 16, 1 18 and 120 may also be connected to the network 1 13, for example by a separate gateway function and/or via the controllers of the macro level stations. The base stations 1 16, 1 18 and 120 may be pico or femto level base stations or the like. In the example, stations 1 16 and 1 18 are connected via a gateway 1 1 1 whilst station 120 connects via the controller apparatus 108. In some embodiments, the smaller stations may not be provided. Smaller base stations 1 16, 1 18 and 120 may be part of a second network, for example WLAN and may be WLAN APs.

The communication devices 102, 104, 105 may access the communication system based on various access techniques, such as code division multiple access (CDMA), or wideband CDMA (WCDMA). Other non-limiting examples comprise time division multiple access (TDMA), frequency division multiple access (FDMA) and various schemes thereof such as the interleaved frequency division multiple access (I FDMA), single carrier frequency division multiple access (SC-FDMA) and orthogonal frequency division multiple access (OFDMA), space division multiple access (SDMA) and so on.

An example of wireless communication systems are architectures standardized by the 3rd Generation Partnership Project (3GPP). A latest 3GPP based development is often referred to as the long term evolution (LTE) of the Universal Mobile Telecommunications System (UMTS) radio-access technology. The various development stages of the 3GPP specifications are referred to as releases. More recent developments of the LTE are often referred to as LTE Advanced (LTE-A). The LTE employs a mobile architecture known as the Evolved Universal Terrestrial Radio Access Network (E-UTRAN). Base stations of such systems are known as evolved or enhanced Node Bs (eNBs) and provide E-UTRAN features such as user plane Packet Data Convergence/Radio Link Control/Medium Access Control/Physical layer protocol (PDCP/RLC/MAC/PHY) and control plane Radio Resource Control (RRC) protocol terminations towards the communication devices. Other examples of radio access system comprise those provided by base stations of systems that are based on technologies such as wireless local area network (WLAN) and/or WiMax (Worldwide Interoperability for Microwave Access). A base station can provide coverage for an entire cell or similar radio service area.

An example of a suitable communications system is the 5G or NR concept. Network architecture in NR may be similar to that of LTE-advanced. Base stations of NR systems may be known as next generation Node Bs (gNBs). Changes to the network architecture may depend on the need to support various radio technologies and finer QoS support, and some on-demand requirements for e.g. QoS levels to support QoE of user point of view. Also network aware services and applications, and service and application aware networks may bring changes to the architecture. Those are related to Information Centric Network (ICN) and User-Centric Content Delivery Network (UC-CDN) approaches. NR may use multiple input - multiple output (MIMO) antennas, many more base stations or nodes than the LTE (a so- called small cell concept), including macro sites operating in co-operation with smaller stations and perhaps also employing a variety of radio technologies for better coverage and enhanced data rates.

Future networks may utilise network functions virtualization (NFV) which is a network architecture concept that proposes virtualizing network node functions into“building blocks” or entities that may be operationally connected or linked together to provide services. A virtualized network function (VNF) may comprise one or more virtual machines running computer program codes using standard or general type servers instead of customized hardware. Cloud computing or data storage may also be utilized. In radio communications this may mean node operations to be carried out, at least partly, in a server, host or node operationally coupled to a remote radio head. It is also possible that node operations will be distributed among a plurality of servers, nodes or hosts. It should also be understood that the distribution of labour between core network operations and base station operations may differ from that of the LTE or even be non-existent.

A possible mobile communication device will now be described in more detail with reference to Figure 2 showing a schematic, partially sectioned view of a communication device 200. Such a communication device is often referred to as user equipment (UE) or terminal. An appropriate mobile communication device may be provided by any device capable of sending and receiving radio signals. Non-limiting examples comprise a mobile station (MS) or mobile device such as a mobile phone or what is known as a’smart phone’, a computer provided with a wireless interface card or other wireless interface facility (e.g., USB dongle), personal data assistant (PDA) or a tablet provided with wireless communication capabilities, or any combinations of these or the like. A mobile communication device may provide, for example, communication of data for carrying communications such as voice, electronic mail (email), text message, multimedia and so on. Users may thus be offered and provided numerous services via their communication devices. Non-limiting examples of these services comprise two-way or multi-way calls, data communication or multimedia services or simply an access to a data communications network system, such as the Internet. Users may also be provided broadcast or multicast data. Non-limiting examples of the content comprise downloads, television and radio programs, videos, advertisements, various alerts and other information.

A mobile device is typically provided with at least one data processing entity 201 , at least one memory 202 and other possible components 203 for use in software and hardware aided execution of tasks it is designed to perform, including control of access to and communications with access systems and other communication devices. The data processing, storage and other relevant control apparatus can be provided on an appropriate circuit board and/or in chipsets. This feature is denoted by reference 204. The user may control the operation of the mobile device by means of a suitable user interface such as key pad 205, voice commands, touch sensitive screen or pad, combinations thereof or the like. A display 208, a speaker and a microphone can be also provided. Furthermore, a mobile communication device may comprise appropriate connectors (either wired or wireless) to other devices and/or for connecting external accessories, for example hands-free equipment, thereto.

The mobile device 200 may receive signals over an air or radio interface 207 via appropriate apparatus for receiving and may transmit signals via appropriate apparatus for transmitting radio signals. In Figure 2 transceiver apparatus is designated schematically by block 206. The transceiver apparatus 206 may be provided for example by means of a radio part and associated antenna arrangement. The antenna arrangement may be arranged internally or externally to the mobile device.

Figure 3 shows an example of a control apparatus for a communication system, for example to be coupled to and/or for controlling a station of an access system, such as a RAN node, e.g. a base station, eNB or gNB, a relay node or a node of a core network such as an MME or S-GW, or a server or host. The method may be implanted in a single control apparatus or across more than one control apparatus. The control apparatus may be integrated with or external to a node or module of a core network or RAN. In some embodiments, base stations comprise a separate control apparatus unit or module. In other embodiments, the control apparatus can be another network element such as a radio network controller or a spectrum controller. In some embodiments, each base station may have such a control apparatus as well as a control apparatus being provided in a radio network controller. The control apparatus 300 can be arranged to provide control on communications in the service area of the system. The control apparatus 300 comprises at least one memory 301 , at least one data processing unit 302, 303 and an input/output interface 304. Via the interface the control apparatus can be coupled to a receiver and a transmitter of the base station. The receiver and/or the transmitter may be implemented as a radio front end or a remote radio head.

Data rates in mobile and fixed access communication systems are increasing due to growing user demands on newer technologies and applications. In fixed access communication systems, the end users are, for example, the occupants in domestic homes who want to access the internet via their routers. In state-of-the-art installations, the first part of the backbone connection to these routers (last mile access) may be twisted pair cabling. Twisted pair cabling may limit the possible data rates to the order of Mb/s. Replacing these connections with optical fibers with higher possible data rates involves heavy construction work and may be costly and/or not practical.

To increase end user data rates a wireless connection may be used in so-called fixed wireless access networks. Wireless links in the millimeter-wave ranges may provide abundant spectrum with higher contiguous bandwidths than wireless links in the microwave range. Moreover, the available antenna arrays may have a smaller size at higher carrier frequencies, enabling smaller equipment. Propagation conditions in the millimeter-wave band and non-line-of-sight connections in the access links may lead to small cell sizes between the serving hub and the end users. In order to increase the possible link lengths and thus improve system coverage, a wireless repeater is proposed which enables a two hops system architecture. In the upstream (uplink) the wireless repeater accumulates the access signals from many users and forwards them on preferred line of sight front haul connections to existing hub sites which have a high bandwidth connection to the backbone network. In the downstream (downlink) the wireless repeater receives front haul signals from the existing hub sites and forwards them to users as access signals.

Repeaters for TDD operation use either an additional control signal sent by the base station to detect and calculate the exact timing for the up-and downlink time slots via digital base band processing, digital base band signal processing of at least a portion of the data signal or a RF power detection based scheme, but with an additional digital timing logic which may prevent fully flexible switching operation needed for high data rates and 5G operation. Such repeaters may be too complex and/or costly.

For a simple and cost-efficient deployment in dense networks, the wireless repeaters should be small and low cost while enabling high data rates over long link lengths. To enable the targeted high data rates for all end users the wireless repeater should provide a fully flexible ratio between down link and uplink times (duration and intervals) controlled by the network side with very fast transition times (<<100ns).

A repeater may comprise an apparatus as described hereafter. An apparatus in accordance with embodiments comprises means for receiving a first signal and means for receiving a second signal. The apparatus comprises means for determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted. The apparatus comprises means for determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

The logic circuit may comprise at least one flip flop circuit. For example, the logic circuit may comprise a first flip flop circuit with the first signal as an input and a second flip flop circuit with the second signal as input. The first flip flop circuit and second flip flop circuit may comprise an edge-triggered D-type flip-flop circuit. The first signal may be a downlink signal. The second signal may be an uplink signal. The apparatus may comprise means for causing the first signal or the second signal to be transmitted. The first signal or second signal may be caused to be transmitted at the same or different frequency to which it was received. The first and second signal may be in the mm- wave range.

The required accurate switching between uplink and downlink times slots for a TDD system may thus be controlled based on analog RF signal power detection analysed by a logic containing edge-triggered flip-flops in a fully flexible way. No information (i.e. frame structure and exact switching timing) is required from the central hub.

Figure 4 shows an example repeater for use in a system where the fronthaul link is in the 39GFIz band and the access link is in the 28GFIz band. The means for receiving a first signal comprise a 39GFIz receiver antenna. The means for receiving a second signal comprises a 28GFIz receiver array. The repeater comprises a RF power detection circuit and a TDD logic control circuit. The means for causing the first signal to be transmitted comprises a 28GFIz transmitter array. The means for causing the second signal to be transmitted comprises a 39GFIz transmitter antenna.

The apparatus may comprise a means for detecting the power of the first signal and a means for detecting the power of the second signal. Figure 5 shows a block diagram of an example architecture for analog RF power detection based TDD logic. The logic may provide a simple and fast TDD logic. A power detector (PD) detects the downlink data signal power. A second power detector detects the uplink data signal power. The PDs may be, for example, RF envelope detectors.

The means for determining if the power of the first signal is higher than a reference power value and if the power of the second signal is higher than a reference power value may comprise a comparator. In the example shown in Figure 5, comparators are positioned after each of the PDs. The comparators may use a fixed reference voltage as a threshold value. The logic comprises buffers. The buffers are used to decouple the components and to enable a longer line length to the edge-triggered D-type flip-flops.

In this embodiment, if the power of the first signal, e.g., the incoming downlink signal power approaches the threshold of the comparator, the first, or upper, flip-flop circuit receives a rising edge and sets the output high. With that the second, or lower, flip-flop circuit is reset and waits for a rising edge at its input, corresponding to an uplink or second signal power level approaching the reference threshold at the lower comparator. If the lower flip flop receives a rising edge, the lower flip-flop resets the upper flip-flop and generates a low at the output. The next rising edge on the downlink signal power can then set the output level to high to start the cycle again.

An additional splitter may be used to control two switches between transmitting the first signal and the second signal (switching between downlink or uplink time slots) in a decoupled way. If the hub and the users all transmit only at their respective times slots assigned by higher layer signalling then also the repeater will work in sync.

With a state-of-the-art power detector and high-speed logic components the required fast and reliable switching speed of less than 100ns may be achieved.

Figure 6 shows a block diagram of a possible embodiment. The block diagram depicts the location of the power detectors (PD1 , PD2), controlling the TDD sensor circuit.

The block diagram also depicts switches (SWn). The switches may be configured to select one of a plurality of fixed beam patterns of the antenna. The switches may be analog switches. SW1 and SW4 control the TDD switching functionality between the UL and DL. The beam switches SW2 and SW3 may be configured by a control channel input to select one of a plurality of fixed beam patterns of the DL and UL antennas. The block diagram illustrates a signal 610 transmitted by the downlink antenna. The block diagram also illustrates a signal 620 transmitted by the uplink antenna.

The fronthaul and access links may be in the same band (i.e. 28GHz) or in different bands (i.e. fronthaul link in 39GHz band and access link in 28GHz band as described with reference to Figure 4).

Since the power detector sensitivity may be limited, the power detector may be placed at a location where the data signal power is high, e.g. after the power amplifier both in the access and fronthaul transmitter for downlink and uplink detection, respectively. At this point the signal also has passed the available filters and therefore any unwanted interference from disturbing signals which could otherwise disturb TDD switching scheme may be minimized.

The switching between DL and UL time slots may be performed either with additional RF switches or by directly switching the PAs on and off based on the TDD logic output. As a result, the power detectors are placed between the pre-amplifiers and the final stage PAs so that these final stage PAs can then be switched on or off. The system shown in Figure 6 includes a passive antenna array together with a switch for the access beam switching. This means that the antenna has e.g. 8 inputs corresponding to the available 8 beam directions and the switch is a 1 :8 switch. Based on the configuration of the antenna set by the control channel information, the switch forwards the RF data signal to/from one antenna beam.

A system comprising a plurality of mmWave repeaters is shown in Figure 7. The repeaters may be working on the same frequency but with spatial separation or on the same frequency but in TDD mode or on different frequencies.

A repeater as defined with reference to Figure 4 to 7 may be fully flexible. The repeater may be low cost because it comprises analog architecture, omitting digital processing of the data signal.

Figure 8 shows a simplified test setup which may be used to evaluate the performance of the TDD switching logic.

Exemplarily, two coupled signal sources transmitting TDD test signals were used to generate DL and UL data signals. The DL signal was then split up in two paths. One path serves as input into the DL power detector, the other one is the input into the test switch. Both components can operate up to 40 GHz. The output of the TDD logic either turns the switch on for DL time slot or off for UL time slot. The resulting output signals were then analysed with an oscilloscope or a spectrum analyser. In the first test, the speed performance of the switching was tested. The measured results with RF test signals at 1 GHz are shown in Figure 9 and were measured with an oscilloscope. The top channel 1 depicts the marker signal as reference which is time aligned with the DL RF data signal. The second from top channel 2 is the output of our TDD logic circuit. In this implementation, a‘high’ is UL time slot and a‘low’ is DL time slot and turns the DL switch on. The delay between the rising edge of the marker in channel one and the falling edge of the TDD logic output in channel 2 is only around 50 ns. The second from bottom channel 3 analyses the RF signal at the DL switch output. There, the very fast complete switching delay between incoming RF signal and switch output signal of only 64 ns can be measured which is well below the target of 100 ns for 5G systems. In a final test, a DL test signal at 39 GHz was generated and the data signal performance was analysed with a spectrum analyser.

The apparatus may comprise a control apparatus as described with reference to Figure 3. Control functions may comprise receiving a first signal, receiving a second signal, determining if the power of the first signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the first signal is caused to be transmitted and determining if the power of the second signal is higher than a reference power value; and, if so, resetting the output of a logic circuit such that the second signal is caused to be transmitted.

It should be understood that the apparatuses may comprise or be coupled to other units or modules etc., such as radio parts or radio heads, used in or for transmission and/or reception. Although the apparatuses have been described as one entity, different modules and memory may be implemented in one or more physical or logical entities.

It is noted that whilst embodiments have been described in relation to mm-wave for fixed wireless application, similar principles can be applied in relation to other networks and communication systems where repeaters are used. Therefore, although certain embodiments were described above by way of example with reference to certain example architectures for wireless networks, technologies and standards, embodiments may be applied to any other suitable forms of communication systems than those illustrated and described herein.

It is also noted herein that while the above describes example embodiments, there are several variations and modifications which may be made to the disclosed solution without departing from the scope of the present invention.

In general, the various embodiments may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. Some aspects of the invention may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device, although the invention is not limited thereto. While various aspects of the invention may be illustrated and described as block diagrams, flow charts, or using some other pictorial representation, it is well understood that these blocks, apparatus, systems, techniques or methods described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.

The embodiments of this invention may be implemented by computer software executable by a data processor of the mobile device, such as in the processor entity, or by hardware, or by a combination of software and hardware. Computer software or program, also called program product, including software routines, applets and/or macros, may be stored in any apparatus- readable data storage medium and they comprise program instructions to perform particular tasks. A computer program product may comprise one or more computer-executable components which, when the program is run, are configured to carry out embodiments. The one or more computer-executable components may be at least one software code or portions of it.

Further in this regard it should be noted that any blocks of the logic flow as in the Figures may represent program steps, or interconnected logic circuits, blocks and functions, or a combination of program steps and logic circuits, blocks and functions. The software may be stored on such physical media as memory chips, or memory blocks implemented within the processor, magnetic media such as hard disk or floppy disks, and optical media such as for example DVD and the data variants thereof, CD. The physical media is a non-transitory media.

The memory may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as semiconductor based memory devices, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory. The data processors may be of any type suitable to the local technical environment, and may comprise one or more of general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASIC), FPGA, gate level circuits and processors based on multi core processor architecture, as non-limiting examples.

Embodiments of the inventions may be practiced in various components such as integrated circuit modules. The design of integrated circuits is by and large a highly automated process. Complex and powerful software tools are available for converting a logic level design into a semiconductor circuit design ready to be etched and formed on a semiconductor substrate.

The foregoing description has provided by way of non-limiting examples a full and informative description of the exemplary embodiment of this invention. Flowever, various modifications and adaptations may become apparent to those skilled in the relevant arts in view of the foregoing description, when read in conjunction with the accompanying drawings and the appended claims. Flowever, all such and similar modifications of the teachings of this invention will still fall within the scope of this invention as defined in the appended claims. Indeed there is a further embodiment comprising a combination of one or more embodiments with any of the other embodiments previously discussed.