Title:
METHOD AND APPARATUS FOR MATRIX COMPUTATION ACCELERATION
Document Type and Number:
WIPO Patent Application WO/2023/046001
Kind Code:
A1
Abstract:
A matrix multiplication acceleration method and apparatus is provided. A DMA operation transfers matrix data from a host memory to an accelerator memory, or vice-versa. The DMA operation also rearranges the matrix data into a suitable two dimensional or four-dimensional format. The accelerator can perform multiplications for portions of the matrix at a time. The DMA operation can in some cases interchange the order of the two matrices being multiplied to cause a transpose of the multiplication result.
Inventors:
YE ZICHUN (CA)
WANG KAI-TING AMY (CA)
WANG KAI-TING AMY (CA)
Application Number:
PCT/CN2022/120452
Publication Date:
March 30, 2023
Filing Date:
September 22, 2022
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F12/1081; G06F13/28
Foreign References:
| US20180349290A1 | 2018-12-06 | |||
| US20190079885A1 | 2019-03-14 | |||
| CN111291858A | 2020-06-16 | |||
| CN106775598A | 2017-05-31 | |||
| US20200310803A1 | 2020-10-01 | |||
| US20200210517A1 | 2020-07-02 | |||
| US20200081744A1 | 2020-03-12 |
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