Description of the Related Art Some conventional imaging systems (e. g., for use in imaging patterns directly on printed circuit boards) write images in a single pass.

Images are written by scanning gaussian spots in rows (along a fast scan or"x"axis) while the media is moved in an orthogonal direction (along a slow scan or"y"axis). The spacing between spot centers is referred to as the"address unit"of the imager. In one conventional system (useful for imaging circuit features directly on printed circuit boards), the address unit is equal to the gaussian spot size which is 0.5 mils (12.7 gum). We use the term"size" (or diameter) of a gaussian spot to denote 2R, where R is the radial distance from its center to the point at which the intensity falls to half its peak value (the peak intensity is the intensity at its center). Image files provided to the system are converted from vector to raster format using an address grid (sampling grid) with resolution equal to the address unit of the imaging system.

Figure 1 shows the placement of such spots (gaussian spots 14) at the image plane relative to the rectilinear vector-to-raster address grid 12.

Herein, we use the expression"vector-to-raster conversion" (or "rasterization") to denote conversion of vector-format pattern data

(image files) to pixel values. Pixel values are sometimes referred to herein as"bitmap"data, and files containing pixel values sometimes referred to as"bitmap"files.

In order to provide increased image placement resolution capability in such a system, multi-pass interleaved writing can be implemented. This writing technique is discussed in, for example, U. S.

Patent 4,879,605, issued November 7,1989; U. S. Patent 5,103,101, issued April 7,1992; and U. S. Patent 5,533,170 (issued July 2,1996).

The multi-pass interleaved writing strategy can also be used for imaging when the finest CD control on the minimum feature size is required (i. e., when worst case grid snapping errors cannot be tolerated). Grid snapping is a phenomenon that occurs when features are not laid out on an address grid that matches the imaging system's address unit.

In a multi-pass interleaved writing scheme, the vector-to-raster conversion is typically performed with an address grid whose cells are smaller than the pixel (spot) size. Typically, the cells of the address grid have length which is half the spot size and width which is half the spot size (i. e., the spacing between adjacent cells of the address grid along a first axis ("x"axis) of the grid is half of the spacing between adjacent spot centers along that axis, and the spacing between adjacent cells of the grid along an orthogonal axis ("y"axis) is half of the spacing between adjacent spot centers along the latter axis). In the vector-to- raster conversion (or"rasterization") process, vector-format pattern data are converted to pixel values. The pixel values are sometimes referred to as"bitmap"files.

For specificity, the present paragraph will assume a typical address grid (for imaging of circuit features on a printed circuit board) having 4000 DPI resolution (in the sense that it has 4000 address cells per inch along each of the"x"and"y"axes) and a spot size of 0.5 mils (i. e., it is assumed that each pixel is a Gaussian spot of diameter 0.5 mils = 12.7, um). Following completion of the vector-to-raster

conversion process (using the noted address grid), the generated pixel values (having 4000 DPI resolution) are subdivided into multiple (typically two or four) separate 2000 DPI bitmap files which are compatible with the hardware architecture of the imaging system.

Subdivision of the pixel value file (having 4000 DPI resolution) into four bitmap files file (each having 2000 DPI resolution) would be performed by overlaying a 2000 DPI grid (address grid 32 of Fig. 2) onto the 4000 DPI address grid (address grid 22 of Fig. 2), and identifying each pixel value with a quadrant of the 2000 DPI grid. All pixels from the same quadrant of each cell of the 2000 DPI grid (grid 32) are extracted to a single 2000 DPI bitmap file. For example, all of the quadrant #1 pixels (the pixels in the upper right quadrants of grid 32's cells, viewed as in Fig. 2) are sent to a first bitmap file (to be written in the first pass of the multi-pass writing operation), all of the quadrant #2 pixels (the pixels in the upper left quadrants of grid 32's cells) are sent to a second bitmap file (to be written in the second pass of the multi-pass writing operation, and so on. To accomplish the writing operation, the beam scanning apparatus is shifted by an appropriate value for each of the first, second, third, and fourth writing passes, to direct pixels to spots on the target with the desired resolution (along each of the"x"and"y"axes).

Summary of the Invention The invention is an imaging method and system in which offline rasterization is performed to convert pattern data into a sequence of pixel values, the pixel values are stored, and the stored pixel values are later retrieved and used to perform a multi-pass, interleaved imaging operation. During the rasterization operation, multiple bit maps (each bit map indicative of pixels to be written) are generated. Preferably, a high resolution address grid is employed to determine the pixel values, and a low resolution address grid is employed to separate the pixels into multiple bit map files, each of the bit map files having low resolution.

During the multi-pass imaging operation, the bit maps are retrieved and processed to generate beam control signals for implementing multiple imaging passes, where the expression"beam control signals"denotes signals which allow (where"to allow"is used in a broad sense to denote either to"cause"or to"allow') and prevent projection of imaging radiation on a target with predetermined timing. In some embodiments, the beam control signals are employed to turn on and off each of one or more beams of the radiation with predetermined timing. Multi-pass imaging is performed to write the pixel values on a target with high resolution. In some embodiments, the pixels to be written are indicative of circuit features (features of a circuit), and the pixels are written directly on a printed circuit board.

Rasterization (including the separation of the resulting pixels into low resolution bit maps) is typically time-consuming, relative to the time required for writing of pre-determined bit maps. Thus, the inventors have appreciated that it is preferable (in typical applications) to perform the rasterization operation offline (in advance of writing), and then to retrieve the low resolution bit maps (and process them to generate control signals for a beam scanning device) online (as part of the multipass writing step).

Brief Description of the Drawings Fig. 1 is a diagram showing a conventional array of spots (indicative of pixel values) with an address grid superimposed thereon.

Fig. 2 is a diagram showing a first address grid with another address grid (having half the resolution of the first address grid along both the"x"and"y"directions) superimposed thereon.

Fig. 3 is a block diagram of an imaging system which can be programmed and operated in accordance with the invention.

Fig. 4 is a diagram showing one cell of grid 32 of Fig. 2, with four spots (indicative of pixel values) that correspond to its four quadrants in

the positions in which they would be written on a target in accordance with a four-pass embodiment of the invention.

Fig. 5 is a diagram representing pixels written by a conventional one-pass method on a target.

Fig. 6 is a diagram representing pixels written by an embodiment of the inventive two-pass interleaved method.

Fig. 7 is a diagram showing four cells of grid 32 of Fig. 2, each with two spots (indicative of pixel values) that correspond to two diagonal quadrants thereof, in the positions in which the spots would be written on a target in accordance with a two-pass embodiment of the invention.

Fig. 8 is a diagram showing one cell of a low resolution address grid used in rasterization, in an embodiment of the invention employing Virtual Addressing, with four spots (indicative of pixel values) that correspond to four of the sixteen cells of the high resolution grid on which the low resolution grid is overlayed, in the positions in which the spots would be written on a target in accordance with the invention.

Detailed Description of the Preferred Embodiments In preferred embodiments of the inventive multi-pass interleaved writing scheme in which Gaussian spots indicative of pixels are written on an object, vector-to-raster conversion (rasterization) performed with a two-dimensional address grid whose resolution (along each axis) is half of the spot size. For example, such an address grid can be 4000 DPI (along each axis) where the spot size is 0.5 mils (12.7 ß^m). In some embodiments, the invention is implemented as a method and system for imaging circuit features on a printed circuit board.

After the vector-to-raster conversion has been completed, the generated pixel values (having a first resolution) are subdivided into two or more separate bitmap files (each having a"low"resolution that is lower than the first resolution). The"first"resolution will be referred to

herein as a"high"resolution. For specificity, we assume in the following description a class of embodiments in which the high resolution is 4000 DPI (along each of the"x"and"y"axes), and that the low resolution is 2000 DPI (along each of the"x"and"y"axes). Thus, in such embodiments, after the vector-to-raster conversion has been completed (using a 4000 DPI address grid), the generated pixel values (having 4000 DPI resolution) are subdivided into two, three, or four separate 2000 DPI bitmap files.

The 2000 DPI bitmap files are compatible with the hardware architecture of the imaging system. The subdivision of the pixel value file (having 4000 DPI resolution) is performed by overlaying a 2000 DPI grid ("low resolution"grid 32 of Fig. 2) onto the 4000 DPI grid ("high resolution"grid 22 of Fig. 2), and identifying each pixel value with a quadrant of the 2000 DPI grid. All pixels from the same quadrant (of each cell of gird 32) are extracted to a single 2000 DPI imaging file. For example, all of the quadrant #1 pixels (the pixels in the upper right quadrant of each cell of grid 32, viewed as in Fig. 2) are sent to a first bit map file (to be written in the first pass of the multi-pass writing operation), all of the quadrant #2 pixels (the pixels in the upper left quadrant of each cell of grid 32) are sent to a second bit map file (to be written in the second pass of the multi-pass writing operation), and so on.

Preferably, after the 2000 DPI bit map files are created, these files are compressed, and the compressed files are stored in a redundant array of independent disks (sometimes referred to as a "RAID"). Later, at a convenient time, the stored compressed files are retrieved, expanded (decompressed), and employed to perform a multi- pass interleaved writing operation. Thus, the preferred embodiments of the invention employ"offline"rasterization, in which the pixel values generated during rasterization are stored (preferably as compressed

bitmap files), for later retrieval and"online"use during an"online" writing operation.

To accomplish the writing operation, the beam scanning apparatus is shifted by an appropriate value after each of multiple writing passes, to write the pixels to locations on the target with the desired low (e. g., 2000 DPI) resolution along each of the"x"and"y" axes. The offset for each pass is determined by the respective location of the quadrant (in each cell of the low resolution address grid) that corresponds to the pixel values in the bit map file to be written in that pass.

For example, the system of Fig. 3 can be programmed and operated in accordance with the invention to generate and store four bit maps in data storage unit 4 (in an offline rasterization operation), and to retrieve and process the stored data using controller 6 (and the device identified as"data path"5) to generate beam control signals which are asserted to optical system 8 to cause system 8 to turn on and off (at appropriate times) each of one or more beams of radiation directed at target 12 (which is mounted on x-y stage 13), while stage 13 moves target 12 relative to system 8, to implement a multi-pass interleaved writing operation in which pixels are written on target 12 in four writing passes. Rasterization unit 2 of Fig. 3 performs the offline rasterization operation to generate a high resolution bit map (comprising the pixels in the cells of grid 22 of Fig. 2), and divides the high resolution bit map into four low resolution bit maps: a first bit map, comprising the pixels in the upper right quadrant of each cell of grid 32 (viewed as in Fig. 2); a second bit map, comprising the pixels in the upper left quadrant of each cell of grid 32; a third bit map, comprising the pixels in the lower left quadrant of each cell of grid 32; and a fourth bit map, comprising the pixels in the lower right quadrant of each cell of grid 32. In Fig. 4, pixel 14A is an element of the first bit map, pixel 14B is an element of the second bit map, pixel 14C is an element of the third bit map, and pixel

14D is an element of the fourth bit map. Each of pixels 14A-14D is a Gaussian spot.

To store the four bit maps in data storage unit 4 (which is preferably a RAID, but which alternatively is a tape, diskette, or other storage device or medium), the four bit maps are routed through print queue manager 3 (in response to control signals asserted to unit 3 from system controller 6) to data storage unit 4. Later, when it is desired to write the pixels on a target, controller 6 causes the device identified as "data path"5 to retrieve the stored bit maps from unit 4 and assert them to optical system 8.

Radiation source 10 (which is typically a laser) emits a beam of radiation which is incident at optical system 8. In response, system 8 projects one or more intermittent beams of radiation onto target 12.

For example, system 8 can split one incident beam into multiple beams and direct the multiple beams in parallel to target 12, while shutters within system 8 convert each of the multiple beams into an intermittent beam by allowing or preventing (at appropriate times) the projection of each of the multiple beams onto target 12. While system 8 projects radiation onto target 12, stage 13 moves target 12 relative to system 8 (in response to control signals from system controller 6.

System 8 generates beam control signals in response to the pixels asserted thereto from data path 5. For example, the beam control signals can be voltage (or current) signals which cause shutters within system 8 to allow (or prevent) the transmission of each of one or more beams to target 12 (at appropriate times during the scanning of target 12 relative to system 8).

Rasterization (including the separation of the resulting pixels into low resolution bit maps) will typically be time-consuming, and the inventors have appreciated that it is often preferable (e. g., during typical imaging of circuit features on a printed circuit board) to perform this operation offline (in advance of writing), and then to retrieve the low

resolution bit maps (and process them to generate control signals for the beam scanning device) online (as part of the multipass writing step).

Thus, in response to a first subset of the beam control signals, system 8 images the pixels of the first bit map onto the moving target 12 (with inter-spot spacing equal to the address unit, which is the diameter of each spot). Then, system controller 6 shifts stage 13 (by one half of an address unit) so that radiation subsequently projected by system 8 onto target 12 is projected to spots shifted horizontally (out of the plane of Fig. 4, assuming that the surface of target 12 extends perpendicular to the plane of Fig. 4) by half of an address unit. Then, in response to a second subset of the beam control signals, system 8 images the pixels of the second bit map onto the moving target 12 (with inter-spot spacing equal to the address unit). Then, system controller 6 shifts stage 13 (by one half of an address unit) so that radiation subsequently projected by system 8 onto target 12 is projected to spots shifted vertically (toward the bottom of Fig. 4) by half of an address unit. Then, in response to a third subset of the beam control signals, system 8 images the pixels of the third bit map onto the moving target 12 (with inter-spot spacing equal to the address unit). Then, system controller 6 shifts stage 13 (by one half of an address unit) so that radiation subsequently projected by system 8 onto target 12 is projected to spots shifted horizontally (into the plane of Fig. 4) by half of an address unit.

Then, in response to a fourth subset of the beam control signals, system 8 images the pixels of the fourth bit map onto the moving target 12 (with inter-spot spacing equal to the address unit).

This results in the writing of overlapping spots on the target as indicated in Fig. 4 (with the centers of the written spots spaced by one half address unit along each of the"x"and"y"axes). Figure 4 shows the spot placement at the final image plane relative to the four quadrants in the raster data. Assuming that each of the four low resolution bit maps stored in unit 4 has 2000 DPI resolution, the described four pass method

will provide x and y axis image placement resolution of 0.25 mils (which is a two-fold improvement over a 2000 DPI single pass writing scheme).

The diagonal resolution (along an axis rotated by 45 degrees from the "x"axis) would be 0.25 mils * 2° 5/2.

Two-pass printing of bit maps corresponding to diagonal quadrants of the raster data (such as the upper left and lower right quadrants in Fig. 4) will provide the same x and y image placement resolution as the four-pass method, but the diagonal (45-degree) resolution with two passes is only half that of the four-pass method.

The two-pass, diagonal resolution is equivalent to that of the single pass 2000 DPI method. However, the two-pass method provides a two-fold improvement in off axis edge roughness, as is apparent from comparison of Fig. 5 (representing pixels written by a one-pass method) with Fig. 6 (representing pixels written by the described two-pass interleaved method). An advantage of the described two-pass interleaved method over the described four-pass interleaved method is in throughput (imaging time is reduced by a factor of two when only two passes are performed).

The above-described rasterization operation simply separates the high resolution (e. g., 4000 DPI) bitmap file into multiple low resolution (e. g., 2000 DPI) bitmap files by transferring pixel values. No decisions are made with respect to surrounding pixel values. A more powerful rasterization method is available when the image placement resolution requirements would lead one to choose the four-pass interleave method (rather than the two-pass method). Such more powerful rasterization method is referred to as"Virtual Addressing"and is described below.

In a typical implementation of the Virtual addressing method, the vector-to-raster conversion is performed using an address grid whose cells are one-fourth the imager spot size (along each of the "x"and"y"axes). This would correspond to an 8000 DPI address grid where the spot size is 0.5 mils. The Virtual addressing method would

theoretically provide image placement resolution that is better by a factor of four than that achievable by the four-pass interleaved method and would thus provide better performance with respect to grid snapping. Virtual Addressing uses a raster data-sampling scheme, which turns on all pixels on each even edge of the 8000 DPI grid, but only turns on every other pixel on each odd edge of the grid. The above-described mechanism for multi-pass interleaved writing can be used to incorporate Virtual Addressing without changing the spot size of the imager. The required doubling of the spot to imaging address unit ratio is achieved through multi-pass interleaved writing, using stored bit maps (indicative of the pixels to be written during each pass) that have been generated (and stored) in advance as a result of"offline" rasterization. Variable raster sampling maps can be incorporated in this method to handle various feature orientations. Figure 8 is an example of a Virtual Addressing raster-sampling map that is optimized for both horizontal and vertical features. Fig. 8 shows one cell of a low resolution address grid used in rasterization (in accordance with an embodiment of the invention employing Virtual Addressing), with four spots (indicative of pixel values) that correspond to four of the sixteen cells of the high resolution grid on which the low resolution grid is overlayed, in the positions in which the spots would be written on a target in accordance with the invention.

The described multi-pass interleaved writing technique is easily salable to optical engines having finer resolution than those mentioned herein. The invention can be implemented with any of multiple software raster processing schemes, so that any of multiple schemes (pre- programmed into processor 2 of Fig. 3) can be selected"on the fly"to implement any of a variety of resolution choices. The raster-processing scheme is extendable in the sense that N times the image placement resolution can be achieved with N times the number of passes (to a point of diminishing returns). The spot size of the imager need not

change relative to the spot size employed when conventional one-pass writing is used.

The invention provides the following benefits relative to conventional one-pass writing: improved CD control for off grid features; reduced edge roughness for off axis (angled) features; reduction in grid snapping effects by at least a factor of two; increased image placement resolution ; increased laser lifetime (due to reduction in required laser power levels due to multi-pass imaging); and decreased imaging time (as a result of offline rasterization to generate and store bit map files prior to the imaging operation, so that the bit map files can be rapidly retrieved from storage and used during the imaging operation).

It should be understood that although some embodiments of the invention are described herein, the scope of the invention is defined by the claims and is not to be unduly limited by the specific structures and method implementations described herein.