The present invention relates to a predictive coding method, comprising forming an aliased dif- ference sigrel proportional to the difference between a digital input signal and a digital prediction signal; quantizing the difference signal; summing the prediction signal and the quantized difference signal to form a reconstructed signal representing the input signal; and forming the prediction signal on the basis of the reconstructed signal.

Predictive coding, that -is, DPCM coding (Differential Pulse Code Modulation) utilizes cor¬ relation between the signal values of the input signal by coding and transmitting the difference between the signal values. Figure 1 illustrates the principal features of a typical DPCM coder by means of a block diagram. Block 1 generates a difference signal e(n) between an input signal x(n) and a so- called prediction signal p(n), and the difference signal is quantized in quantization block 3. The quantized difference signal e'(n) is added to the prediction signal p(n) in block 4, so that a so- called reconstructed signal x'(n) is obtained which represents the sum of the input signal x(n) and the quantization error. The prediction signal p(n) to be applied to block 1 is formed in prediction block 5 on the basis of the reconstructed signal x'(n).

The signals x(n) and p(n) are usually parallel digital signals, comprising, e.g., 8 bits, so that their value range is between 0 and 255. In conventio¬ nal DPCM coding, the difference signal e(n) can obtain both positive and negative values, and its unambiguous representation requires one bit more than the representation of the signals x(n) and p(n). For

example, in a 9-bit twos complement representation, the entire value range of the difference signal e(n) is between -256 and +255. The value P of the pre¬ diction signal p(n) determines the value range ^X MI _N ~ ^P * * * ^X M _A X~ ^P possible to the difference signal e(n) at each particular moment, in this specific case -P...255-P, when the maximum and minimum values of the input signal are and Xrø _lN * Thereby only part of the values of the difference signal e(n) and the quantization levels corresponding to them are used at each particular moment, as is shown in Figure 2A.

Aliasing quantization utilizes the above- mentioned property of the difference signal by pro¬ jecting (aliasing) the negative values of the difference signal e(n) within the positive value range before quantization, as is shown in Figure 2B. Aliasing quantization is described, e.g., in "A Simple High Quality DPCM-codec for Video Telephone Using 8 Mbit per Second", Nachtrictentechnische Zeitung, 1974, Haft 3, p. 115-117. In Figure 2B, the negative range of the difference signal, -1...-P, has been projected within the positive range above the value 255-P in such a way that the same quantized value corresponds to the values X and 256-X. Thus the greatest possible positive value of the difference signal is positioned below the value 255-P, and its greatest possible negative value is positioned above said value. In practice, the aliasing can be carried out by omitting the sign bit of the difference signal e(n) when the difference signal is in twos complement form. As one bit less is now used for the representa¬ tion of the difference signal, the value range of the quantization block is smaller by half as compared with normal predictive coding. So the quantization levels are positioned about twice as densely as in

normal predictive coding if the same number of levels can be used for the representation of the quantized difference signal.

The number of the quantization levels Q is typically below 64. Several values of the difference signal e(n) thereby fall within each quantization range Q _n «--Q _n+ ι ^of "the quantization block. With small and large input signal values, the value of the dif¬ ference signal may be projected with the wrong sign in the quantization range including the value 255-P of the difference signal, which from now on will be called erroneous quantization. The negative value of the difference signal, which in Figure 2B is aliased in the quantization range Q _n ***Qn _+l ^above e value 255-P in the positive range, is projected in the quantization as a relatively large positive value of the quantized difference signal e'(n), as shown in Figure 2C. In video transmission, for instance, such erroneous quantization may cause a change of a white picture element into a black picture element, or vice versa.

Attempts have been made to eliminate such an error occurring in aliasing quantization by limiting the signal from above and from below by an amount equal to the greatest possible quantization error. As a consequence, the difference signal cannot obtain values within a quantization range Q _n ...Q _n+ ι in¬ cluding both positive and aliased negative values. Such limitation of the signal, however, impairs con- siderably the dynamics of the input signal especially with coarse quantizers (comprising few quantization levels).

The object of the present invention is to provide a method and an apparatus for aliasing quantization, by means of which erroneous quantize-

tion is prevented without limiting the dynamics of the input signal.

This is achieved according to the invention in such a way that erroneous quantization processes are detected by means of overflows occurring at different times in the difference signal forming process and in the reconstructed signal forming process, and cor¬ rected on the basis of the value of the prediction signal. In the method of the invention, an erroneous quantization process can be easily detected by monitoring the forming processes of the difference signal and the reconstructed signal. In normal oper¬ ation, when a negative value has aliased within the positive range on forming a difference signal, that is, when an overflow has taken place, an overflow correspondingly takes place automatically on forming a reconstructed signal, which compensates for the quantization result distorting effect caused by aliasing, and a correct reconstructed value is obtained as a result. If the overflow occurs only in one of these forming processes, it indicates that an error has occurred in the quantization.

After the detection of erroneous quantization, it can be determined on the basis of the value of the prediction signal whether the erroneous quantization projection has taken place from a positive value to a negative value, or vice versa. In this way, the quantization error can be corrected by means of the prediction signal by selecting the closest correct value of the quantized difference signal or the re¬ constructed signal. This is preferably realized by storing in a memory one correction value for every combination of a difference signal value and a pre- diction signal value. In the case of error, the value

distorted by erroneous quantization is replaced with the correction value.

In the preferred embodiment of the invention, the value of the reconstructed signal distorted by erroneous quantization is replaced with a correction value stored in the memory. In this case, a smaller and more rapid memory can be used than in cases where the quantized difference signal itself is corrected.

A rapid memory is necessary in applications requiring high speed, such as in 34 Mbit/s video codecs. As the reconstructed signal in any case has to be formed before an erroneous quantization process can be detected, the correction of the reconstructed signal is to be preferred also in view of the speed require- ments. The signal processing thereby takes place as a continuously proceeding process, in which signals already formed need not be subsequently corrected.

The invention is also concerned with an apparatus according to claim 6. The invention will now be described in greater detail by means of embodiments with reference to the attached drawings, in which

Figure 1 illustrates a prior art apparatus for predictive coding by means of a block diagram; Figure 2A illustrates the value range of a dif¬ ference signal and the dependence of the values obtained for the difference signal on a value P of a prediction signal;

Figure 2B illustrates an aliased difference signal;

Figure 2C illustrates the formation of a quantization error when quantizing the difference signal of Figure 2B; and

Figure 3 illustrates an apparatus of the inven- tion for aliasing quantization by means of a block

diagram.

In Figure 3, a subtractor circuit 1 subtracts a prediction signal p(n) from an input signal x(n), thus producing an aliased difference signal e(n). The signals x(n) and p(n) are preferably parallel digital 8-bit signals. The subtractor circuit 1 may be a con¬ ventional circuit which produces a signal which is in twos complement form and comprises eight bits and a sign bit. These eight bits form the aliased dif- ference signal e(n), and the sign bit forms an over¬ flow signal OFl. The difference signal e(n) is applied to a quantizer circuit 3 in which it is quantized. A quantized difference signal e' (n) produced by the quantizer circuit 3 is added to the prediction signal p(n) in a summer circuit 4. The summer circuit 4 may be a conventional circuit which produces a signal which is in twos complement form and comprises eight bits and a sign bit. These eight bits form a first reconstructed signal x' _N (n). The sign bit forms an overflow signal 0F2. The first re¬ constructed signal x' _N (n) is applied to one input in a selector circuit 6. A quantization error correction signal x' _0F (n) is applied to another input in the selector circuit 6. The selector circuit 6 connects either one of the two inputs to its output, depending on a control signal OF applied to its control input. An output signal '(n) from the selector circuit 6 forms the final reconstructed signal, on the basis of which the prediction signal p(n) is formed in a pre- diction block and applied to the subtractor circuit 1.

The realization of the prediction block 5 may vary greatly depending on each particular applica¬ tion; typically, it comprises at least a calculation algorithm which calculates the value P of a new pre-

diction signal p(n) from the reconstructed signal ' (n) either without delay or with a predetermined delay. One typical application is video transmission in which the value of the prediction signal p(n) can be calculated, e.g., by means of the preceding picture elements positioned on the same line and by means of adjacent picture elements positioned on a preceding line with a delay of one line period, or a corresponding picture element positioned in a pre- ceding picture field with a delay of one picture field period.

The overflow signal OFl produced by the subtractor circuit 1 and the overflow signal 0F2 produced by the summer circuit 4 are applied to an exclusive OR circuit 8 the output signal of which forms the control signal OF. If no overflow occurs in either of the circuits 1 and 4, that is, OFl = 0 and 0F2 = 0, then OF = 0, whereby the selector circuit 6 connects the first reconstructed signal x' _N (n) to its output. The signal x' _N (n) is connected to the output of the selector circuit 6 also when an overflow occurs in both circuits 1 and 4, that is, OFl = 1 and 0F2 = 1 and OF = 0. Finally, if an overflow occurs in only one of the circuits 1 and 4, that is, OFl = 1 and 0F2 = 0 or OFl = 0 and 0F2 = 1, the state of the control signal OF obtains the value 1, whereby the selector circuit connects an overflow correction signal x* _QF (n) to its output to form the value of the reconstructed signal x'(n) in the case of error. The apparatus shown in Figure 3 also comprises a correction register 7 for erroneous quantization, which produces the quantization correction signal x'øp(n). The prediction signal p(n) is applied to the register 7. The quantization correction register 7 is preferably a memory circuit in which one corrected

value of the reconstructed signal is determined for each value of the prediction signal p(n). This cor¬ rected value forms at each particular moment the quantization correction signal x* _QF (n), which is constantly available at one input of the selector circuit 6, irrespective of whether erroneous quantization has occurred or not. When erroneous quantization occurs and the state of the signal OF is 1, the selector circuit 6 is able to rapidly correct the value of the reconstructed signal x'(n) by con¬ necting the signal x'oF(n) ^to ^ ^ts output-

In the preferred embodiment of the invention, the quantizer circuit 3 contains an intermediate coding circuit 3a for subsequent variable length coding (VLC). On the basis of the quantization result, the intermediate coding circuit 3a forms an intermediate code IC which is typically the ordinal number of the quantization level selected as a quantization result. The number of the quantization levels, as well as that of the values of the dif¬ ference signal e'(n), is typically below 64, whereby the intermediate code IC can be represented by six bits. For this reason, a smaller and more rapid VLC memory can be used. In the embodiment of Figure 3, both overflow signals OFl and 0F2 are applied to the quantizer cir¬ cuit 3. The intermediate coding circuit 3a contains two memories: a normal intermediate coding memory and a correction memory for erroneous quantization. The normal intermediate coding memory contains the ordinal number of each quantization level. When the overflow signals OFl and 0F2 are equal, the inter¬ mediate code IC is formed by means of this memory. The quantization correction memory, in turn, co - prises a corrected intermediate code value for each

combination of a quantization result and unequal overflow signals OFl and 0F2. In error situation, this corrected intermediate code value corresponds to the closest correct quantization level which is not erroneous. The intermediate code IC is formed by means of this memory when erroneous quantization occurs and the states of the signals OFl and 0F2 are unequal.

By means of the preferred embodiment of the invention described above, the detection and correc¬ tion of erroneous quantization can be carried out as rapidly as possible, wherefore it is suitable for applications requiring high speed, e.g., for the transmission of a high-quality video signal. An alternative solution in lower-speed applica¬ tions in particular is to correct the quantized dif¬ ference signal e'(n). In this case, the register 7 is replaced with a correction memory, in which the closest correct value of the quantized difference signal, which does not cause an error and which replaces the value of the quantized difference signal in error situation, is stored for every of the prediction signal p(n) and the difference signal e(n) or e'(n). This kind of memory may be contained in the quantizer circuit 3 or it may be a separate circuit of the same type as the register 7.

Practical applications may comprise several parallel quantizers 3 of Figure 3, each having a separate correction table in the register 7 and the intermediate coding circuit 3a. In such a case, the register 7 also has to be supplied with information about the quantizer which is used for the coding of the signal at each particular moment.

The drawings and the description related to them are only intended to illustrate the present in-

vention. In their details, the method and apparatus of the invention may vary within the scope of the attached claims.