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Title:
METHOD, APPARATUS AND SYSTEM FOR COMMUNICATING INFORMATION
Document Type and Number:
WIPO Patent Application WO/2008/074919
Kind Code:
A1
Abstract:
There is provided a system for communicating information, comprising: a transmitter comprising an encoder including a classifier for classifying coded information bits into systematic bits and parity bits, a first modulator for modulating the systematic bits by a lower order modulation, a second modulator for modulating the parity bits by a higher order modulation, and a combiner for combining the modulated systematic bits and parity bits; and a receiver comprising a decoder including a divider for dividing received symbol estimates into a systematic group and a parity group, a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation, a second demodulator for demodulating the symbol esti mates of the parity group by a higher order demodulation, and a second combiner for combining the demodulated symbol estimates.

Inventors:
WANG HAIFENG (CN)
WANG FANG (CN)
CHEN MING (CN)
CHENG SHIXIN (CN)
Application Number:
PCT/FI2007/050702
Publication Date:
June 26, 2008
Filing Date:
December 19, 2007
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NOKIA CORP (FI)
WANG HAIFENG (CN)
WANG FANG (CN)
CHEN MING (CN)
CHENG SHIXIN (CN)
International Classes:
H03M13/29; H03M13/35
Foreign References:
US20050229073A12005-10-13
US20030081690A12003-05-01
EP1189380A22002-03-20
Other References:
BERROU C. ET AL.: "Near optimum error correcting coding and decoding: Turbo codes", IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 44, no. 10, October 1996 (1996-10-01), pages 1261 - 1271, XP000629465, DOI: doi:10.1109/26.539767
Attorney, Agent or Firm:
KOLSTER OY AB (Iso Roobertinkatu 23, Helsinki, FI)
Download PDF:
Claims:

Claims

1. A method, comprising: classifying coded information bits into systematic bits and parity bits; modulating the systematic bits by a lower order modulation; modulating the parity bits by a higher order modulation; and combining the modulated systematic bits and parity bits.

2. The method of claim 1 , further comprising using binary phase shift keying in the lower order modulation.

3. The method of claim 1 , further comprising using at least one of: quadrature phase shift keying and quadrature amplitude modulation in the higher order modulation.

4. A method, comprising: dividing received symbol estimates into a systematic group and a parity group; demodulating the symbol estimates of the systematic group by a lower order demodulation; demodulating the symbol estimates of the parity group by a higher order demodulation; and combining the demodulated symbol estimates.

5. The method of claim 4, by further comprising deinterleaving de- modulated Log-Likelihood Ratio values of the coded symbols.

6. The method of claim 4, further comprising feeding the demodulated Log-Likelihood Ratio values of the coded symbols to a standard Turbo decoder.

7. The method of claim 4, further comprising using binary phase shift keying in the lower order modulation.

8. The method of claim 4, further comprising using at least one of: quadrature phase shift keying and quadrature amplitude modulation in the higher order modulation.

9. An apparatus, comprising: a classifier for classifying coded information bits into systematic bits and parity bits; a first modulator for modulating the systematic bits by a lower order modulation; a second modulator for modulating the parity bits by a higher order modulation; and a combiner for combining the modulated systematic bits and parity bits.

10. The apparatus of claim 9, wherein a transmission spectral effi-

K K ciency achieved is η = = , where K is

JV W + λT W KnOg 2 M 1 + (N-K)IlOg 2 M 2 the number of information bits, N is the number of coded bits,

11. The apparatus of claim 9, wherein the lower order modulation is binary phase shift keying.

12. The apparatus of claim 9, wherein the higher order modulation is one of: quadrature phase shift keying and quadrature amplitude modulation.

13. An apparatus, comprising: a divider for dividing received symbol estimates into a systematic group and a parity group; a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation; a second demodulator for demodulating the symbol estimates of the parity group by a higher order demodulation; and a combiner for combining the demodulated symbol estimates.

14. The apparatus of claim 13, further comprising a deinterleaver for deinterleaving demodulated Log-Likelihood Ratio values of the coded symbols.

15. The apparatus of claim 14, wherein the deinterleaver is further configured to feed the demodulated Log-Likelihood Ratio values of the coded symbols to a standard Turbo decoder.

16. The apparatus of claim 13, wherein the lower order modulation is binary phase shift keying.

17. The apparatus of claim 13, wherein the higher order modulation is one of: quadrature phase shift keying and quadrature amplitude modulation.

18. A coder-decoder, comprising: a classifier for classifying coded information bits into systematic bits and parity bits; a first modulator for modulating the systematic bits by a lower order modulation; a second modulator for modulating the parity bits by a higher order modulation; a first combiner for combining the modulated systematic bits and parity bits; a divider for dividing received symbol estimates into a systematic group and a parity group; a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation; a second demodulator for demodulating the symbol estimates of the parity group by a higher order demodulation; and a second combiner for combining the demodulated symbol estimates.

19. The coder-decoder of claim 18, wherein a transmission spectral

K K efficiency achieved is η = , where K is the number of information bits, N is the number of coded bits, N SrS =K/log 2 Mι,

20. The coder-decoder of claim 18, wherein the lower order modula- tion is binary phase shift keying.

21. The coder-decoder of claim 18, wherein the higher order modulation is one of: quadrature phase shift keying and quadrature amplitude modulation.

22. The coder-decoder of claim 18, by further comprising a deinter- leaver for deinterleaving demodulated Log-Likelihood Ratio values of the coded symbols.

23. The coder-decoder of claim 22, wherein the deinterleaver is further configured to feed the demodulated Log-Likelihood Ratio values of the coded symbols to a standard Turbo decoder.

24. A computer-readable distribution medium encoding a computer program of instructions for executing a computer process for encoding/decoding, the encoding process comprising: classifying coded information bits into systematic bits and parity bits; modulating the systematic bits by a lower order modulation; modulating the parity bits by a higher order modulation; and combining the modulated systematic bits and parity bits; and the decoding process comprising: dividing received symbol estimates into a systematic group and a parity group; demodulating the symbol estimates of the systematic group by a lower order demodulation; demodulating the symbol estimates of the parity group by a higher order demodulation; and combining the demodulated symbol estimates.

25. The computer-readable distribution medium of claim 28, the distribution medium including at least one of the following media: a computer readable medium, a program storage medium, a record medium, a computer readable memory, a computer readable software distribution package, a computer readable signal, a computer readable telecommunications signal, and a computer readable compressed software package.

Description:

METHOD, APPARATUS AND SYSTEM FOR COMMUNICATING INFORMATION

Field

The invention relates to an apparatus, a coder-decoder, a system for communicating information, a method, and a computer-readable distribution medium.

Background

Information bits going through a wireless communication network, such as UTRAN (UMTS terrestrial radio access network), undergo several coding processes. Convolution codes and Turbo codes are examples of the types of channel coding algorithms.

An example of a novel Turbo codec is described in C. Berrou, A. Glavieux and P. Thitimajshima: "Near Shannon limit error correcting coding and decoding: Turbo codes (1 )", Proc. IEEE ICC 1993, pp. 1064-1070, May 1993. The Turbo codes described in the reference have been proved to have near-capacity performance on additive white Gaussian noise (AWGN) channels. These binary error-correcting codes are built from a parallel concatenation of two recursive systematic convolution codes with a feedback decoder as described in S. L. Goff, A. Glavieux and C. Berrou: "Turbo-codes and high spectral efficiency modulation", Proc. IEEE ICC 1994, pp. 645-649, May 1994. For achieving variable coded rates, a solution where a puncturing function is applied to the coded bits is commonly used. Due to its relatively simple structure and outstanding error correction performance, Turbo codes have been specified in the 3 rd generation of mobile systems and are considered to be one of the best candidates as a channel codec in future systems, such as 3.9 G in 3GPP standardization and Wimax.

The puncturing function is applied to the Turbo coded bits in order to achieve various code rates. Puncturing is followed by a modulator, which is defined by a modulation and coding set. The above reference by S. L. Goff introduced a coding scheme associated with a Turbo code and a bandwidth effi- cient modulation. After Turbo coding and puncturing, parity bits are modulated by a Turbo Codes Coded Modulation (TCCM), thereby providing a substantial coding gain in both AWGN and Rayleigh fading channels.

A reference Y. M. Choi, PJ. Lee: "Analysis of turbo codes with asymmetric modulation ", IEEE Electronics Lett, vol. 35, no. 1 , pp. 35-36, Jan 1999 proposes assigning different energies to systematic bits and parity bits,

respectively. An optimum ratio between the energies allocated to systematic bits and parity bits has a great impact on improving the Turbo codec performance. Neverthless, both TCCM and asymmetric modulation are proposed to the punctured Turbo coded bits. A structure of a conventional Turbo codec with puncturing is illustrated in Figures 1A and 1 B. In the conventional schemes, information bits 102 are encoded by a standard Turbo encoder 100 and followed by a brutal puncturing function 112 according to selected code rates R according to an AMC set. Encoder 100 in this example includes two convolutional encoders 106, 108 in parallel separated by an interleaver 104. A task of the interleaver 104 is to randomize data before it enters the second encoder 108. The encoded data is combined in a combiner 110. For the purpose of uncorrelated noises at the Turbo decoder input, an interleaver 114 can be applied after the puncturing function 112 and prior to uniform modulation 116. Both systematic bits and par- ity bits are mapped into symbols by a uniform M-order modulator 116. A transmission spectral efficiency η can be written as: η = RlOg 2 M (1 )

At a receiver side, as illustrated in Figure 1 B, the estimated symbols are demapped into Log Likelihood Ratios (LLRs) of bits by an M-order de- modulator 118 where the LLRs of the punctured bits are filled with zeros. Finally, all the LLRs are deinterleaved in a deinterleaver 120, zero-filled 122 and decoded by a standard Turbo decoder 124.

Brief description of the invention

An object of the invention is to provide an improved apparatus, a coder-decoder, a system for communicating information, a method, and a computer-readable distribution medium encoding a computer program of instructions for executing a computer process for encoding/decoding.

According to an aspect of the invention, there is provided an apparatus comprising: a classifier for classifying coded information bits into system- atic bits and parity bits; a first modulator for modulating the systematic bits by a lower order modulation; a second modulator for modulating the parity bits by a higher order modulation; and a combiner for combining the modulated systematic bits and parity bits.

According to another aspect of the invention, there is provided an apparatus comprising: a divider for dividing received symbol estimates into a systematic group and a parity group; a first demodulator for demodulating the

symbol estimates of the systematic group by a lower order demodulation; a second demodulator for demodulating the symbol estimates of the parity group by a higher order demodulation; and a combiner for combining the demodulated symbol estimates. According to another aspect of the invention, there is provided a coder-decoder comprising: a classifier for classifying coded information bits into systematic bits and parity bits; a first modulator for modulating the systematic bits by a lower order modulation; a second modulator for modulating the parity bits by a higher order modulation; a first combiner for combining the modulated systematic bits and parity bits; a divider for dividing received symbol estimates into a systematic group and a parity group; a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation; a second demodulator for demodulating the symbol estimates of the parity group by a higher order demodulation; and a second combiner for combining the demodulated symbol estimates.

According to another aspect of the invention, there is provided a system for communicating information, comprising: a transmitter comprising an encoder including a classifier for classifying coded information bits into systematic bits and parity bits, a first modulator for modulating the systematic bits by a lower order modulation, a second modulator for modulating the parity bits by a higher order modulation, and a combiner for combining the modulated systematic bits and parity bits; and a receiver comprising a decoder including a divider for dividing received symbol estimates into a systematic group and a parity group, a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation, a second demodulator for demodulating the symbol estimates of the parity group by a higher order demodulation, and a second combiner for combining the demodulated symbol estimates.

According to another aspect of the invention, there is provided a method, comprising: classifying coded information bits into systematic bits and parity bits; modulating the systematic bits by a lower order modulation; modulating the parity bits by a higher order modulation; and combining the modulated systematic bits and parity bits.

According to another aspect of the invention, there is provided a method, comprising: dividing received symbol estimates into a systematic group and a parity group; demodulating the symbol estimates of the systematic

group by a lower order demodulation; demodulating the symbol estimates of the parity group by a higher order demodulation; and combining the demodulated symbol estimates.

According to another aspect of the invention, there is provided a computer-readable distribution medium encoding a computer program of instructions for executing a computer process for encoding/decoding. The encoding process comprises: classifying coded information bits into systematic bits and parity bits; modulating the systematic bits by a lower order modulation; modulating the parity bits by a higher order modulation; and combining the modulated systematic bits and parity bits. The decoding process comprises: dividing received symbol estimates into a systematic group and a parity group; demodulating the symbol estimates of the systematic group by a lower order demodulation; demodulating the symbol estimates of the parity group by a higher order demodulation; and combining the demodulated symbol estimates. According to another aspect of the invention, there is provided an apparatus, comprising: classifier means for classifying coded information bits into systematic bits and parity bits; modulating means for modulating the systematic bits by a lower order modulation; modulating means for modulating the parity bits by a higher order modulation; and combining means for combining the modulated systematic bits and parity bits.

According to another aspect of the invention, there is provided an apparatus, comprising: dividing means for dividing received symbol estimates into a systematic group and a parity group; demodulating means for demodulating the symbol estimates of the systematic group by a lower order demodu- lation; demodulating means for demodulating the symbol estimates of the parity group by a higher order demodulation; and combining means for combining the demodulated symbol estimates.

The invention provides several advantages. A significant performance gain is achieved. A bit error rate and frame error rate performance are improved. The desired spectral efficiency level is achieved even without using a brutal puncturing function.

List of drawings

In the following, the invention will be described in greater detail with reference to the embodiments and the accompanying drawings, in which Figure 1A illustrates an example of a conventional encoder structure;

Figure 1 B illustrates an example of a conventional decoder structure;

Figure 2 illustrates an example of a radio system to which the embodiments of the invention can be applied; Figure 3 illustrates an example of an encoder structure according to an embodiment;

Figure 4 illustrates an example of a decoder structure according to an embodiment of the invention; and

Figures 5 and 6 illustrate examples of an encoding method and a decoding method according to embodiments of the invention.

Description of embodiments

With reference to Figure 2, examine an example of a radio system to which embodiments of the invention can be applied. A radio system in Figure 2 represents the third-generation radio systems. The embodiments are, however, not restricted to these systems described by way of example, but a person skilled in the art can apply the instructions to other radio systems containing corresponding characteristics. The embodiments of the invention can be applied, for example, to future Broadband Wireless Access (BWA), 3G LTE (long term evolution) and 4G systems. The main parts of a radio system are a core network (CN) 200, a radio access network 230, and user equipment (UE) 270. The term UTRAN is short for UMTS Terrestrial Radio Access Network, i.e. the radio access network 230 belongs to the third generation and is implemented by wideband code division multiple access (WCDMA) technology. Figure 2 also shows a base station system 260, which belongs to the 2/2.5 generation and is implemented by time division multiple access (TDMA) technology, but it is not further described here.

On a general level, the radio system can also be defined to comprise user equipment, which is also known as a subscriber terminal and a mo- bile phone, for instance, and a network part, which comprises the fixed infrastructure of the radio system, i.e. the core network, radio access network and a base station system.

The structure of the core network 200 corresponds to a combined structure of the GSM and GPRS systems. GSM network elements are respon- sible for establishing circuit-switched connections, and GPRS network ele-

ments are responsible for establishing packet-switched connections; some of the network elements are, however, in both systems.

The base station system 260 comprises a base station controller (BSC) 266 and base transceiver stations (BTS) 262, 264. The base station controller 266 controls the base transceiver station 262, 264. In principle, the aim is that devices implementing the radio path and their functions reside in the base transceiver station 262, 264, and control devices reside in the base station controller 266.

The radio access network 230 is made up of radio network subsys- terns 240, 250. Each radio network subsystem 240, 250 is made up of radio network controllers 246, 256 and B nodes 242, 244, 252, 254. A B node is a rather abstract concept, and often the term base transceiver station is used instead.

Operationally, the radio network controller 240, 250 approximately corresponds to the base station controller 266 of the GSM system, and the B node 242, 244, 252, 254 approximately corresponds to the base transceiver station 262, 264 of the GSM system. Solutions also exist in which the same device is both the base transceiver station and the B node, i.e. said device is capable of implementing both the TDMA and the WCDMA radio interface si- multaneously.

The user equipment 270 may comprise mobile equipment (ME) 272 and a UMTS subscriber identity module (USIM) 274. USIM 274 contains information related to the user and information related to information security in particular, for instance, an encryption algorithm. In UMTS networks, the user equipment 270 can be simultaneously connected with a plurality of base transceiver stations (Node B) in the occurrence of soft handover.

In UMTS, the most important interfaces between network elements are the Iu interface between the core network and the radio access network, which is divided into the interface IuCS on the circuit-switched side and the interface IuPS on the packet-switched side, and the Uu interface between the radio access network and the user equipment. In GSM, the most important interfaces are the A interface between the base station controller and the mobile services switching center, the Gb interface between the base station con- troller and the serving GPRS support node, and the Um interface between the base transceiver station and the user equipment. The interface defines what

kind of messages different network elements can use in communicating with each other. The aim is to provide a radio system in which the network elements of different manufacturers interwork well so as to provide an effective radio system. In practice, some of the interfaces are, however, vendor- dependent.

Figure 3 illustrates an example of an apparatus, such as an encoder, structure according to an embodiment. The encoder can reside in any transmitter of a radio network, for example. In an embodiment, the encoder comprises: a classifier 304 for classifying coded information bits into system- atic bits and parity bits, a first modulator 310 for modulating the systematic bits by a lower order modulation, a second modulator 312 for modulating the parity bits by a higher order modulation, and a combiner 314 for combining the modulated systematic bits and parity bits.

Let us assume that at the transmitter, K information bits, Xk,k=l, 2,...fi, are encoded by a standard Turbo encoder 300 into N coded bits, The coded bits are interleaved at an interleaver 302 in order to obtain uncorrelated fading. In an embodiment, instead of brutal puncturing, the encoded bits are classified by a classifier 304 into two groups: systematic bits X Sιi ,i=l,2,...j[ (306) and parity bits (308). Further, hybrid modulations follow after the classifying. The systematic bits 306 are modulated by a lower order constellation in an Mi- order modulator 310, and the parity bits 308 are modulated by a higher order constellation in an M 2 -order modulator 312, respectively.

Let us denote the systematic symbols by ,..,N s ,s and the par- ity symbols by and A transmission spectral efficiency η can then be written as:

η

It can be seen that the conventional Turbo codes with brutal puncturing and uniform modulation is a special case of equation (2) where M 1 = M 2 = M, and η=Rlog 2 M. Finally, the systematic and parity symbols are blended evenly at a combiner 314, and then transmitted.

In an embodiment, the lower order modulation used is binary phase shift keying, and the higher order modulation is quadrature phase shift keying or quadrature amplitude modulation. Usually, higher order modulation is a type

of digital modufation with an order of four or higher. However, the modulation schemes used can also be other than described in these examples.

Figure 4 illustrates an example of an apparatus, such as a decoder, structure according to an embodiment of the invention. The decoder can reside in a receiver of a radio network. In an embodiment, the decoder comprises: a divider 420 for dividing received symbol estimates into a systematic group 422 and a parity group 423, a first demodulator 424 for demodulating the symbol estimates of the systematic group by a lower order demodulation, a second demodulator 426 for demodulating the symbol estimates of the parity group by a higher order demodulation, and a combiner 428 for combining the demodulated symbol estimates.

Thus, at the receiver side, the symbol estimates are divided into systematic and parity groups followed by the different demodulators correspondingly. Finally, the demodulated Log-Likelihood Ratio values of the coded symbols are deinterleaved at a deinterleaver 430 and fed to a standard Turbo decoder 432.

Figure 5 illustrates an example of an encoding method according to an embodiment of the invention. The method starts in 500. In 502, coded information bits are classified into systematic bits and parity bits. In 504, the sys- tematic bits are modulated by a lower order modulation. In 506, the parity bits are modulated by a higher order modulation. In 508, the modulated systematic bits and parity bits are combined. In 510, the generated systematic and parity symbols are upconverted and transmitted. The method ends in 512.

Figure 6 illustrates an example of a decoding method according to an embodiment of the invention. The method starts in 600. In 602, received symbol estimates are divided into a systematic group and a parity group. In 604, the symbol estimates of the systematic group are demodulated by a lower order demodulation, in 606, the symbol estimates of the parity group are demodulated by a higher order demodufation. In 608, the demodulated symbol estimates are combined. In 610, the demodulated LLRs are deinterleaved and decoded. The method ends in 612.

In an embodiment the Turbo coded systematic and unpunctured parity bits are, thus modulated by different modulation alphabets separately instead of the puncturing used in conventional Turbo codec with variable cod- ing rates. Systematic bits are modulated by a lower order modulation and the unpunctured parity bits are modulated by a higher order modulation to reach

the same spectral efficiency as with the conventional Turbo codec with puncturing. The proposed scheme outperforms the conventional scheme with puncturing and has at least the same spectral efficiency in BER/FER performance of Turbo codec in Rayleigh flat fading channels. Further, since the bandwidth in an embodiment is fixed, a lower coding rate can be used. The embodiments of the invention can also be extended to convolutional codes and other codes as well. In an embodiment, instead of puncturing away parity bits from a base code to provide a Vz rate code, the parity bits are transmitted by introducing a "sub"-modulation scheme on top of the existing modulation scheme, thus al- lowing more parity bits to be transmitted.

The embodiments of the invention may be implemented in a transceiver comprising a coder-decoder including: a classifier for classifying coded information bits into systematic bits and parity bits; a first modulator for modulating the systematic bits by a lower order modulation; a second modulator for modulating the parity bits by a higher order modulation; a first combiner for combining the modulated systematic bits and parity bits; a divider for dividing received symbol estimates into a systematic group and a parity group; a first demodulator for demodulating the symbol estimates of the systematic group by a lower order demodulation; a second demodulator for demodulating the sym- bol estimates of the parity group by a higher order demodulation; and a second combiner for combining the demodulated symbol estimates. The coder- decoder may be configured to perform at least some of the steps described in connection with the flowchart of Figures 5 and 6 and in connection with Figures 3 and 4. The embodiments may be implemented as a computer program com- prising instructions for executing a computer process for communicating information.

The computer program may be stored on a computer program distribution medium readable by a computer or a processor. The computer- readable program medium may be, for example but not limited to, an electric, magnetic, optical, infrared or semiconductor system, device or transmission medium. The computer program medium may include at least one of the following media: a computer readable medium, a program storage medium, a record medium, a computer readable memory, a random access memory, an erasable programmable read-only memory, a computer readable software dis- tribution package, a computer readable signal, a computer readable telecom-

munications signal, computer readable printed matter, and a computer readable compressed software package.

Even though the invention has been described above with reference to an example according to the accompanying drawings, it is clear that the invention is not restricted thereto but it can be modified in several ways within the scope of the appended claims.




 
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