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Patent Searching and Data


Title:
METHOD AND APPARATUS TO SOLVE PFC CAPACITOR REDUCTION OF LINE AFLC RIPPLE WITHOUT PASSIVE FILTERS
Document Type and Number:
WIPO Patent Application WO/2016/138847
Kind Code:
A1
Abstract:
Audio Frequency Load Control (AFLC) signal processing electronics are provided, which added to a power factor correction (PFC) unit allowing the AFLC system to operate without the need of large and heavy passive bypass or blocking filters at the PFC installations. The AFLC signal processing electronics comprise a first group of additional electronics tuned to the AFLC frequency for detecting the AFLC carrier signal and a second group of additional electronics for driving an AFLC impedance switch (306) that is connected in parallel with an AFLC impedance (305). The AFLC impedance (305) is connected in series with the PFC capacitors (304), and is sufficiently large to offer significant impedance in series with the PFC capacitors (304) that allow the AFLC signal to bypass the PFC unit.

Inventors:
STEWART NEAL GEORGE (CN)
CHENG WING LING (CN)
Application Number:
PCT/CN2016/075144
Publication Date:
September 09, 2016
Filing Date:
March 01, 2016
Export Citation:
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Assignee:
EDGE ELECTRONS LTD (CN)
International Classes:
H04B3/54; H02M1/12
Foreign References:
CN203136271U2013-08-14
CN1085702A1994-04-20
CN102469623A2012-05-23
CN202475418U2012-10-03
KR20060062973A2006-06-12
US20100118983A12010-05-13
CN2287354Y1998-08-05
Other References:
See also references of EP 3266111A4
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (Zhongguancun Intellectual Property Building Block B,No.21 Haidian South Road, Haidian, Beijing 0, CN)
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