METHOD FOR THE CONSTRUCTION OF VERTICAL POWER TRANSISTORS WITH DIFFERING POWERS BY COMBINATION OF PRE-DEFINED PART PIECES

Title:

METHOD FOR THE CONSTRUCTION OF VERTICAL POWER TRANSISTORS WITH DIFFERING POWERS BY COMBINATION OF PRE-DEFINED PART PIECES

Document Type and Number:

WIPO Patent Application WO2006037313

Kind Code:

A3

Abstract:

Method and system for designing a vertical MOS power transistor with specified design output. The method comprises the composition of a layout for the vertical MOS power transistor as a combination of at least partly different layout sections, each with known design data with at least one first layout section with a known number of individual transistors and the fixing of the specific design output by means of the known design data and the number of applied layout sections.

Inventors:

LERNER RALF (DE)
MIESCH WOLFGANG (DE)

Application Number:

PCT/DE2005/001780

Publication Date:

October 26, 2006

Filing Date:

October 05, 2005

Export Citation:

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Assignee:

X FAB SEMICONDUCTOR FOUNDRIES (DE)
ALPHA MICROELECTRONICS GMBH (DE)
LERNER RALF (DE)
MIESCH WOLFGANG (DE)

International Classes:

G06F17/50

Foreign References:

US5686750A	1997-11-11
US5844277A	1998-12-01

Other References: