CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority to U.S. Utility Application No.

15/014,275 filed on February 3, 2016 and claims the benefit of U.S. Provisional Application No. 62/1 1 1 ,864 filed on February 4, 2015. The entire disclosures of the above applications are incorporated herein by reference. FIELD

[0002] The present disclosure relates to method for detecting a failing rectifier or rectifier source, for example in an uninterruptible power supply system.

BACKGROUND

[0003] In uninterruptible power supply systems, a DC/DC converter is typically disposed between the DC bus and a secondary power source, such as a battery. Upon detecting a failure in the primary power source, the DC/DC converter switches from supplying power to the battery over to supplying power to the inverter. Conventional techniques for detecting a failure in the primary power source involve measuring the source voltage. Such techniques may falsely detect a failure during the occurrence of a surge or sag in the source voltage. Additionally, relying solely on the source voltage will not detect a failure of the rectifier.

[0004] Therefore, it is desirable to develop an improved technique for detecting a failing rectifier or rectifier source. This section provides background information related to the present disclosure which is not necessarily prior art.

SUMMARY

[0005] This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.

[0006] A method is provided for detecting a failure of a rectifier or a rectifier source in context of an uninterruptible power supply. The method includes: measuring an input current into the rectifier from a primary power source; determining a rate of change in the measured current; determining a current difference between a reference current and the measured current; measuring voltage output by the rectifier; determining a voltage difference between a reference voltage and the measured voltage; and detecting a failure condition of the rectifier as a function of the measured input current, the rate of change in the measured current, the current difference, the measured voltage and the voltage difference. More specifically, a failure condition of the rectifier is identified when the input current is decreasing and the rate of change in the measured current is decreasing and the current difference is increasing and the voltage difference is increasing.

[0007] In response to identifying a failure condition, power supplied to the inverter is switch from the primary power source to the secondary power source. In some embodiments, the switch to the secondary power supply may be delayed for a period of time.

[0008] In one aspect, input current and output voltage are measured in the D phase of a rotating reference frame.

[0009] Further areas of applicability will become apparent from the description provided herein. The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

DRAWINGS

[0010] The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.

[0011] Figure 1 is a block diagram depicting a typical uninterruptible power supply (UPS);

[0012] Figure 2 is a diagram for a typical control scheme for a UPS;

[0013] Figure 3 is a flowchart illustrating a method for detecting a failure condition of the rectifier;

[0014] Figure 4 is a diagram for a control scheme which implements rectifier failure detection logic; [0015] Figure 5 is a flowchart depicting an example embodiment of the rectifier failure detection logic; and

[0016] Figure 6 are simulation results of control signals for various disturbances

[0017] Corresponding reference numerals indicate corresponding parts throughout the several views of the drawings.

DETAILED DESCRIPTION

[0018] Example embodiments will now be described more fully with reference to the accompanying drawings.

[0019] Figure 1 is a simplified schematic of a typical uninterruptible power supply 10. An uninterruptible power supply (UPS) 10 is typically used to protect computers, data centers, telecommunications equipment or other electrical equipment. The UPS 1 10 generally includes a bypass switch 1 1 , a UPS switch 12, a UPS converter 13, an output terminal 14 and a controller 15. In the example embodiment, the bypass switch 1 1 is coupled between the primary power source 16 and the output terminal 14 and configured to receive an AC input signal from the primary power source 16. In a similar manner, the UPS converter 13 is coupled between the primary power source 16 and the output terminal 14 and configured to receive an AC signal from the primary power source 16. The UPS switch 12 is interposed between an output of the UPS converter 13 and the output terminal 14.

[0020] The UPS converter 13 further includes a rectifier 4, an inverter 6, a DC/DC converter 18 and a secondary power source 9, such as battery. The rectifier 4 converts the AC input from an AC signal to a DC signal; whereas, the inverter 6 converts a DC signal to an AC signal. The DC/DC converter 18 interfaces the battery 9 to the main DC bus. The inverter 6 is configured to receive an input signal from either the rectifier 4 or the battery 9. In normal operation, the rectifier 4 supplies the DC signal to the inverter 6 and the DC/DC converter 18 provides a charging current for the battery 9. If the primary power source 16 is not available or the rectifier cannot otherwise provide enough power, the DC/DC converter switches from a charging mode to a discharging mode and the battery 9 supplies the input signal to the inverter 6. Such converter arrangements are known in the art.

[0021 ] The controller 15 monitors the operating conditions of the UPS 10 and controls the bypass switch 1 1 and the UPS switch 12 depending on the selected mode of operation and the operating conditions. In an exemplary embodiment, the controller 15 is implemented as a microcontroller. In other embodiments, controller may implemented in a field programmable gate array, a complex programmable logic device, analog circuitry or other suitable components that provide the described functionality; or a combination of some or all of the above.

[0022] Figure 2 depicts a typical control scheme for the rectifier of the UPS. In this example, the control scheme is implemented in the direct quadrature rotating reference frame. The control scheme is comprised generally of an outer voltage loop 21 and two inner current loops: one for the D axis 22 and one for the Q axis 23. The outer voltage loop 21 operates in the D axis and regulates the power supplied by the rectifier to the main DC bus. The inner current loops provide fast transient response and power factor control. While reference is made throughout this disclosure to a DQ reference frame, it is envisioned that the concepts described herein are applicable to other types of rotational reference frames as well as stationary reference frames.

[0023] When in a normal operating mode, the voltage error (V _dc error) and the current error ( Ide error) in the control loops are very small. When there is a change in the load or a change in the source voltage, these error signals will increase or decrease accordingly. Likewise, when there is a problem with the rectifier, these error signals will change as well. Table 1 below shows the changes to various control signals for different types of disturbances.

If the input current (IDE) is greater than threshold one and the rate of change of the input current (ΔΙ ₀ Ε) is greater than zero, then the load is increasing and so the increase in voltage error is expected. Conversely, if the input current is not greater than threshold one and the rate of change of the input current is not greater than zero, then the load is decreasing and so the increase in current error is expected. For load changes, it is noted that the voltage error and the current error change in opposite directions. The input current (IDE) and the rate of change of the input current (ΔΙΟΕ) change in the same direction as the voltage error.

[0024] More importantly, when the rectifier fails or the input source to the rectifier fails (i.e., primary power source), the input current and the rate of change of the input current are always increasing while the voltage error and the current error are always decreasing. In fact, the rate of decrease or increase is much greater than when the load changes. This observation can be used to detect the occurrence of a failing rectifier or rectifier source. Simulation results of the control signals for different disturbances are illustrated in Figure 6

[0025] An improved technique for detecting a failing rectifier or rectifier source is further described in relation to Figure 3. Various control signals are measured and computed during operation of an UPS. For example, the input current into the rectifier from the primary power source is measured at 31 . From the measured input current, the rate of change in the measured current can be computed at 32, for example by subtracting consecutive measures. Additionally, the current error can be computed at 33 by taking a difference between a reference current and the measured current, where the reference current may be defined as the desired D phase current.

[0026] Voltage output by the rectifier is also measured at 34. From the measured voltage, the voltage error can be computed at 35 by taking the difference between a reference voltage and the measured voltage, where the reference voltage is a target out voltage which may be set by a user. Different techniques for measuring voltage or current fall within the scope of this disclosure.

[0027] A failing condition of the rectifier or the rectifier source is then detected at 36 as a function of the measured current, the rate of change in the measured current, the current difference, the measured voltage and the voltage difference. In one embodiment, the measure current and the rate of change in the measure current can be used to determine the occurrence or absence of a change in the load serviced by the rectifier. In the absence of a load change, a failing condition is identified when the current difference and the voltage difference are both increasing. In other embodiments, a failing condition can be identified when the input current is decreasing, the rate of change in the measured current is decreasing, the current difference is increasing and the voltage difference is increasing. In response to identifying a failure condition, the controller will take corrective actions. In the context of a UPS, power supplied to the inverter is switched from the primary power source to the secondary power source.

[0028] Figure 4 depicts a control scheme for the rectifier which implements rectifier failure detection logic. For the most part, the control scheme implements the three control loops described above in relation to Figure 2. The controller 15 of the UPS is configured to receive control signals. In particular, the controller receives the measured current, the current error and the voltage error. One or more of these signals may pass through a low pass filter before reaching the controller 15. Filtering removes noise from the control signals and provides signal stability before the decision process. The controller 15 also receives the derivative or rate of change of the measured current as well.

[0029] Figure 5 sets forth an example embodiment of the rectifier failure detection logic. First, the measured input current and the rate of change of the measured current are compared to thresholds one and two, respectively, as indicated at 51 and 52. The load is deemed to be changing when one or both of these metrics are above respective thresholds and thus the rectifier and the rectifier source are deemed to be functioning properly. If either of these metrics are decreasing or below the respective thresholds, the load is not changing and further inquiries are made. Next, the voltage error and the current error are compared at 53 and 54 to thresholds three and four, respectively. If the voltage error and the current are both above respective thresholds, then rectifier or the rectifier source is deemed faulty as indicated at 56; otherwise, the rectifier and the rectifier source are deemed to be functioning properly as indicated at 55. [0030] In a normal mode, power is supplied from the primary power source via the rectifier to the inverter. Additionally, the DC/DC converter provides a charging signal to the secondary power source (e.g., battery). In discharge mode, power is supplied from the secondary power source via the DC/DC converter to the inverter. When a failure condition is detected at 56, the DC/DC converter is immediately changed from charge mode to the discharge mode so that the DC bus is maintained for the inverter. In some embodiments, there is a short delay (e.g., about one millisecond) before switching modes so as to avoid false triggers.

[0031] For the example embodiment, pseudo code for detecting a failure condition is set forth below.

If Input Current (IDe) is Greater Than "THRESHOLD 1 " AND

Input Current Rate of Change (dIDe/dt) is Greater than "THRESHOLD 2", Then

Load Change is TRUE.

Else

Load Change is FALSE.

If Voltage Error (Vdc error) is Greater Than "THRESHOLD 3" AND

Current Error (Ide error) is Greater Than "THRESHOLD 4" AND

Load Change is FALSE,

Then

Rectifier cannot support the DC Bus, switch to Discharge Mode.

Else

Rectifier is ok, take no action.

It is to be understood that only the relevant steps of the methodology are discussed above, but that other software-implemented instructions may be implemented by the controller and needed to control and manage the overall operation of the UPS. [0032] The techniques described herein may be implemented by one or more computer programs executed by one or more processors. The computer programs include processor-executable instructions that are stored on a non-transitory tangible computer readable medium. The computer programs may also include stored data. Non-limiting examples of the non-transitory tangible computer readable medium are nonvolatile memory, magnetic storage, and optical storage.

[0033] Some portions of the above description present the techniques described herein in terms of algorithms and symbolic representations of operations on information. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. These operations, while described functionally or logically, are understood to be implemented by computer programs. Furthermore, it has also proven convenient at times to refer to these arrangements of operations as modules or by functional names, without loss of generality.

[0034] Unless specifically stated otherwise as apparent from the above discussion, it is appreciated that throughout the description, discussions utilizing terms such as "processing" or "computing" or "calculating" or "determining" or "displaying" or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system memories or registers or other such information storage, transmission or display devices.

[0035] Certain aspects of the described techniques include process steps and instructions described herein in the form of an algorithm. It should be noted that the described process steps and instructions could be embodied in software, firmware or hardware, and when embodied in software, could be downloaded to reside on and be operated from different platforms used by real time network operating systems.

[0036] The present disclosure also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored on a computer readable medium that can be accessed by the computer. Such a computer program may be stored in a tangible computer readable storage medium, such as, but is not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, magnetic or optical cards, application specific integrated circuits (ASICs), or any type of media suitable for storing electronic instructions, and each coupled to a computer system bus. Furthermore, the computers referred to in the specification may include a single processor or may be architectures employing multiple processor designs for increased computing capability.

[0037] The algorithms and operations presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may also be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatuses to perform the required method steps. The required structure for a variety of these systems will be apparent to those of skill in the art, along with equivalent variations. In addition, the present disclosure is not described with reference to any particular programming language. It is appreciated that a variety of programming languages may be used to implement the teachings of the present disclosure as described herein.

[0038] The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.