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Title:
METHOD AND DEVICE FOR EVALUATING ATOMIC VACANCIES IN SILICON WAFER SURFACE LAYER
Document Type and Number:
WIPO Patent Application WO/2015/068391
Kind Code:
A1
Abstract:
 In the present invention, a method for evaluating atomic vacancies in a silicon wafer surface layer includes: an element formation step in which a pair of comb-shaped electrodes (31, 32) are formed on the same surface of a silicon sample (6) over piezoelectric thin films (29, 30); a detection step during which the silicon sample (6) is cooled and an ultrasonic pulse is generated from one comb-shaped electrode (31) while an external magnetic field is applied, the ultrasonic pulse being propagated through the surface of the silicon sample (6) and received by the other comb-shaped electrode (32), and a phase difference being detected between the ultrasonic pulse generated by the one comb-shaped electrode (31) and the ultrasonic pulse received by the other comb-shaped electrode (32); and an evaluation step during which the elastic constant of the surface of the silicon sample (6) is determined on the basis of the phase difference, and the atomic vacancies in the surface of the silicon sample (6) are evaluated on the basis of changes in the elastic constant according to temperature or changes in the elastic constant according to the intensity of the magnetic field.

Inventors:
GOTO TERUTAKA (JP)
NEMOTO YUICHI (JP)
KANETA HIROSHI (JP)
AKATSU MITSUHIRO (JP)
MITSUMOTO KEISUKE (JP)
Application Number:
PCT/JP2014/005580
Publication Date:
May 14, 2015
Filing Date:
November 05, 2014
Export Citation:
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Assignee:
UNIV NIIGATA (JP)
International Classes:
G01N29/04; H01L21/66
Foreign References:
JP2007263960A2007-10-11
JP2005037153A2005-02-10
JPH07174742A1995-07-14
Attorney, Agent or Firm:
SAKURA PATENT OFFICE, p. c. et al. (JP)
Patent business corporation cherry tree international patent firm (JP)
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