Title:
METHOD FOR INSPECTING VIA HOLE OF WAFER
Document Type and Number:
WIPO Patent Application WO/2023/058817
Kind Code:
A1
Abstract:
The present invention relates to a method for inspecting a via hole formed in a wafer and, more specifically, to an inspection method for inspecting whether the shape and the depth of a via hole formed in a wafer are defective. A method for determining whether a via hole formed in a wafer is defective by using a program installed in a wafer inspection system comprises the steps of: receiving three-dimensional image information about the via hole formed in the wafer; detecting the edge of the via hole by using the received three-dimensional image information and an edge detection algorithm; determining whether the detected edge is in a set range; dividing a three-dimensional image of the via hole, which is generated from the three-dimensional image information about the via hole, into at least two regions if the detected edge is in the set range; and determining whether the depth of the via hole is defective by checking whether the volume of each of the divided regions is in a set range.
Inventors:
BACK SEUNG GYUN (KR)
LEE JAE YEOL (KR)
SHIN HO CHEOL (KR)
KIM DAE HWAN (KR)
LEE JAE YEOL (KR)
SHIN HO CHEOL (KR)
KIM DAE HWAN (KR)
Application Number:
PCT/KR2021/018078
Publication Date:
April 13, 2023
Filing Date:
December 02, 2021
Export Citation:
Assignee:
GOOIL ENG CO LTD (KR)
International Classes:
H01L21/66; G01B11/24; G01N21/95; G03H1/26; G06T7/00; G06T7/11; G06T7/13
Foreign References:
KR20200118905A | 2020-10-16 | |||
KR100931364B1 | 2009-12-11 | |||
KR20200142233A | 2020-12-22 | |||
KR20130126370A | 2013-11-20 | |||
KR20010065639A | 2001-07-11 |
Attorney, Agent or Firm:
HAEDAM IP GROUP (KR)
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