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Patent Searching and Data


Title:
METHOD FOR MANUFACTURING CIRCUIT BOARD, AND CIRCUIT BOARD OBTAINED USING THE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2010/064602
Kind Code:
A1
Abstract:
A method for manufacturing a circuit board is provided with: a film forming step of forming a resin film on the surface of an insulating base material; a circuit pattern forming step of forming a circuit pattern section by forming a recessed section having a depth equivalent to the thickness of the resin film or more, with the outer surface of the resin film as a reference; a catalyst applying step of applying a plating catalyst or the precursor thereof on the surface of the circuit pattern section and on the surface of the resin film; a film removing step of removing the resin film from the insulating base material; and a plating step of forming an electroless plating film only on a portion where the plating catalyst or the precursor thereof remains after removing the resin film.

Inventors:
YOSHIOKA SHINGO (JP)
FUJIWARA HIROAKI (JP)
Application Number:
PCT/JP2009/070106
Publication Date:
June 10, 2010
Filing Date:
November 30, 2009
Export Citation:
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Assignee:
PANASONIC ELEC WORKS CO LTD (JP)
YOSHIOKA SHINGO (JP)
FUJIWARA HIROAKI (JP)
International Classes:
H05K3/10; H05K3/18; H05K3/22
Foreign References:
JP2007088288A2007-04-05
JPS63183445A1988-07-28
JP2004281427A2004-10-07
JP2003309346A2003-10-31
JP2003264359A2003-09-19
JP2008058710A2008-03-13
JP2008022002A2008-01-31
JP2004048030A2004-02-12
JPH1078654A1998-03-24
JP2002252445A2002-09-06
JPH07509322A1995-10-12
JPS57134996A1982-08-20
JPS58186994A1983-11-01
JPH07281437A1995-10-27
JP2000231190A2000-08-22
JP2001201851A2001-07-27
JP2000231190A2000-08-22
JP2001201851A2001-07-27
JPH01212262A1989-08-25
JPH07281437A1995-10-27
Other References:
See also references of EP 2367405A4
Attorney, Agent or Firm:
KOTANI, Etsuji et al. (JP)
Etsuji Kotani (JP)
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