Title:
METHOD FOR MANUFACTURING CMOS-TYPE LTPS TFT SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2019/200835
Kind Code:
A1
Abstract:
Provided in the present invention is a method for manufacturing a CMOS-type LTPS TFT substrate. The method comprises: forming, by means of a semi-transmissive mask, a second photoresist section of a second photoresist pattern over a region, in which P-type ion heavy doping is required, of a second polysilicon active layer as a protective layer, wherein when a first polysilicon active layer is subjected to N-type ion heavy doping, N-type ions can be effectively blocked from being implanted in a second source-drain contact region of the second polysilicon active layer. Compared with the prior art, when the second polysilicon active layer is subsequently subjected to P-type ion heavy doping to form a second source-drain contact region, the capacity loss of a P-type ion heavy doping process is reduced without additionally compensating P-type ions, and the convergence of the electrical properties of a PMOS transistor is improved since a N-type ion heavy doping process cannot affect the PMOS transistor; moreover, since the number of times ion implantation is performed on the second polysilicon active layer is reduced, damage to a thin film lattice structure by ion implantation is reduced, and the stability of a device is improved.
Inventors:
LI LISHENG (CN)
LIU GUANGHUI (CN)
LIU GUANGHUI (CN)
Application Number:
PCT/CN2018/106332
Publication Date:
October 24, 2019
Filing Date:
September 18, 2018
Export Citation:
Assignee:
WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD (CN)
International Classes:
H01L27/12; H01L21/77
Foreign References:
CN104167390A | 2014-11-26 | |||
CN108511464A | 2018-09-07 | |||
US7064021B2 | 2006-06-20 | |||
US6846707B2 | 2005-01-25 |
Attorney, Agent or Firm:
COMIPS INTELLECTUAL PROPERTY OFFICE (CN)
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