Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/1998/005061
Kind Code:
A1
Abstract:
In a method for manufacturing semiconductor device, wafers W are respectively placed on the wafer mounting stages (2) of a single wafer processing low-pressure CVD system including a heat-treating chamber (1) and the wafer mounting stages (2) which are vertically provided in the chamber, and films are formed on the wafers W while the wafers W are heated. At the time of loading the wafers W into the chamber preheated to a desired heat-treating temperature, at least the wafers W placed on the stages (2) other than the lowest stage (2) are not immediately placed on the stages, but left in the chamber (1) until the temperatures at the central parts of the wafers W rise to near the temperature in the chamber (1). Thereafter, the wafers W are placed on the prescribed stages of the stages (2) and the films are formed on the wafers W.
Inventors:
FUJITA SHIGERU (JP)
FURUNO MAKOTO (JP)
ITATANI HIDEHARU (JP)
FURUNO MAKOTO (JP)
ITATANI HIDEHARU (JP)
Application Number:
PCT/JP1997/002666
Publication Date:
February 05, 1998
Filing Date:
July 31, 1997
Export Citation:
Assignee:
SONY CORP (JP)
KOKUSAI ELECTRIC CO LTD (JP)
FUJITA SHIGERU (JP)
FURUNO MAKOTO (JP)
ITATANI HIDEHARU (JP)
KOKUSAI ELECTRIC CO LTD (JP)
FUJITA SHIGERU (JP)
FURUNO MAKOTO (JP)
ITATANI HIDEHARU (JP)
International Classes:
C23C16/44; C23C16/458; C23C16/46; H01L21/205; H01L21/31; H01L21/683; (IPC1-7): H01L21/31; C23C16/46; H01L21/205
Foreign References:
| JPS6381933A | 1988-04-12 | |||
| JPH0573936U | 1993-10-08 | |||
| JPH07249672A | 1995-09-26 |
Attorney, Agent or Firm:
Matsukuma, Hidemori (8-1 Nishishinjuku 1-chom, Shinjuku-ku Tokyo 160, JP)
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