METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT

WIPO Patent Application WO/2020/174529

A1

The purpose of the present invention is to provide a technique enabling suppressing defects in semiconductor elements. This semiconductor element manufacturing method involves: a step for forming a laminate body comprising an adhesive protection layer, an adhesive layer, a release layer and a support substrate arranged in that order on a first primary surface of a semiconductor substrate; a step for removing the semiconductor substrate outside of an area where multiple circuit elements are formed; a step for bonding the area where the circuit elements are formed to a transfer substrate; a step for removing the release layer, the support substrate and the adhesive layer; a step for removing the adhesive protection layer by chemical treatment; and a step for dividing the multiple circuit elements.

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FUJIKAWA MASAHIRO (JP)
NISHIMURA KUNIHIKO (JP)
HIZA SHUICHI (JP)
YAGYU EIJI (JP)

PCT/JP2019/007036

September 03, 2020

February 25, 2019

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MITSUBISHI ELECTRIC CORP (JP)

H01L21/304; H01L21/02; H01L21/336; H01L21/683; H01L27/12; H01L29/786

WO2019013212A1	2019-01-17
WO2018083961A1	2018-05-11
WO2018016350A1	2018-01-25

JP2014130853A	2014-07-10
JP2013243275A	2013-12-05
JP2015032797A	2015-02-16
JP2013232459A	2013-11-14

YOSHITAKE Hidetoshi et al. (JP)

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