TITLE

Method for modulating a complex digital input signal and signal modulator

BACKGROUND

The present invention relates generally to transmitters for telecommunication and data technology and more particular to wideband signal modulators and modulation methods for use in mobile wireless networks. Modern communication standards like e.g. WLAN (Wireless Local Area Network), UMTS

(Universal Mobile Telecommunications System), LTE (Long Term Evolution) or NGMN (Next Generation Mobile Networks) are designed in such a manner that a transmitter communicates with a receiver over a transmission medium by modulating a carrier signal with a modulating signal that contains the information to be transmitted. For this purpose, a plurality of modulation techniques are known from the prior art. A common modulation technique is known as "quadrature modulation", wherein a cosine carrier is modulated with the in-phase (I) component and a sine carrier is modulated with the quadrature phase (Q) component. The in-phase (I) and the quadrature phase (Q) components are the real and the imaginary components of a modulation symbol in the constellation diagram to be transmitted. In this way, the symbol can be transmitted with two carrier signals at the same frequency independently from each other. Another common modulation technique is known as "polar modulation" which is based on representation of the modulation symbol in the constellation diagram solely by its polar coordinates: the radial and the angular components. The radial component is used to modulate the amplitude of the carrier signal and the angular component is used to modulate the phase.

Over the last years, the data traffic on mobile wireless networks has been increasing exponentially. According to the mobility report of a leading multinational provider of communication technology and services, data traffic has increased on mobile wireless networks from less than 100 PetaBytes/month in 2009 to more than 1500 PetaBytes/month in 2013. The data traffic is most probably going to increase even further in future. It is, for example, expected that the number of 4G subscribers in China alone will grow by 900 million new subscribers until 2020 according to a report in the mobile world congress (MWC) 2014. The key challenge is to ensure that the capacity of the wireless networks for mobile communication copes with the dramatic increase in the expected data throughput caused by the rising demand of high speed mobile internet connectivity.

One option for increasing to effective throughput of wireless networks is to increase the bandwidth of the wireless communication channels. By increasing the bandwidth of the channel while keeping the same modulation complexity, the channel can handle data with higher data rates for the same user. Furthermore, channel aggregation is another option to concentrate more channels for different users to increase the effective throughput of the network. If the allowed operating bandwidth for a certain operator is not wide enough then non- continuous channel transmission is another potential option for increasing the capacity of wireless networks.

For this approach, transmitters with new channel modulator topologies are needed which are capable of transmitting such wideband signals in order to increase the effective bandwidth of transmission and to increase the utilization of the available bandwidth. In quadrature modulation system using transmitter architecture with l-Q RF upconverter, a way of increasing the bandwidth is to use a digital to analog converter (DAC) operated with much higher sampling rates. A drawback of this approach is the comparatively high power consumption.

In polar modulations system, a phase locked loop (PLL) is commonly employed to modulate the phase of the carrier signal. However, in polar transmitters, where both phase and amplitude are splitted to get the least out-of-band transmit-to-receive spectral noise, a limitation in the operating bandwidth exists due to the limited speed of the phase-locked loop (PLL) even with two point modulation scheme. Another major drawback of using polar transmitters is the delay mismatch between the phase and the amplitude paths which is a function of the modu- lation bandwidth. That means that the wider the bandwidth the less tolerance for this delay mismatch.

Another architecture is the radio frequency digital-to-analog converter (RF-DAC), where a digital data stream is fed directly to the l-Q switches which are being upsampled by the carrier frequency. Disadvantageously, the RF-DAC architecture suffers from matching problems between its own cells, so that it is difficult to achieve higher resolution. DISCLOSURE OF THE INVENTION

It is an object of the present invention to provide a method and a device for modulating high bandwidth signals combined with comparatively high resolution, low complexity and low power consumption. Furthermore, the above mentioned disadvantages of the prior art should be avoided and a small form factor is desirable.

The object of the present invention is achieved by a method for modulating a complex digital input signal IN comprising the steps of

- providing an intermediate signal S, representing at least partially the complex digital input signal IN by an input unit in a first step, - selecting in the constellation diagram an angular cluster C, located between by the angles φ, and φ, + Δφ containing the intermediate signal S, by a cluster selection module in a second step,

- operating multiple gain stages A" for the respective phase signals φ, and φ, + Δφ of the selected cluster Q in dependency of phase and magnitude of the intermediate signal S, and adding the output signals from the multiple first gain stages A' _n together to a phase- and magnitude-modulated output signal SO, by an additive interpolator in a third step.

The object of the present invention is analogously also achieved with a signal modulator for modulating a complex digital input signal IN, in particular configured to perform a method according to one of the preceding claims, comprising

- a multilevel signal component separator configured to provide an intermediate signal Si representing at least partially the complex digital input signal IN,

- a cluster selection module configured to select in the constellation diagram (20) an angular cluster C, located between by the angles φ, and φ, + Δφ containing the inter- mediate signal S,,

- an additive interpolator comprising multiple gain stages A" and being configured to operate the multiple gain stages A _n for the respective phase signals φ, and φ, + Δφ of the selected cluster Q in dependency of phase and magnitude of the intermediate signal S, and to add the output signals from the multiple gain stages A' _n together to a phase- and magnitude-modulated output signal SO,.

It is herewith advantageously possible to increase speed and accuracy of the signal modulator and respectively of the corresponding modulation method. The main idea is to divide the modulation progress into two separate stages, a first stage for phase clustering and a second stage for phase and amplitude interpolation. The first stage is provided for subdividing the constellation diagram into certain angular clusters of equal size (in principle, the angular clusters can also have different sizes). The cluster selection module chooses the cluster, in which the intermediate signal is located. It works therefore as a coarse phase division. Preferably, the cluster selection module comprises a phase generator feeding a high speed multiplexer for selecting the cluster, so that high resolution (more than 12 bits) with high switching speed can be provided. In particular, the phase generator provides a range of discrete phase signals and the multiplexer selects the required cluster by choosing adjacent phase signals (fr and φ, + Δφ delimiting the cluster in which the modulation symbol is located in the constellation diagram. The second stage is provided for phase and amplitude interpolation within the selected cluster. For this purpose, the second stage comprises multiple gain stages for each of both phase signals (fr and φ, + Δφ. In particular, a plurality of first gain stages A ¹ , is provided for phase signal φi and a plurality of second gain stages A ² , is provided for phase signal φ, + Δφ. The location of the symbol inside the cluster (in the constellation diagram) is interpolated by enabling/disabling a certain number of these first and second gain stages A ¹ ,, A ² , relatively to each other. The number of enabled gain stages A ¹ ,, A ² corresponds to phase and magnitude of the intermediate signal S,. The position of the symbol in the constellation diagram can precisely be interpolated by enabling an appropriate number of first gain stages A ¹ , and an appropriate number of second gain stages A ² . More precisely, the overall number of enabled gain stages A ¹ ,, A ² refers to the distance of the symbol from the origin in the constellation diagram, wherein the relative ratio between enabled first gain stages A ¹ , and enabled second gain stages A ² refers to the angle of the symbol in the constellation diagram. As the interpolation has been done only in the limited cluster, selected in the first stage, the resolution in the second stage did not need to be as high as in conventional l-Q RFDAC's in order to achieve a high overall resolution. For example, only seven bits of resolution in the second stage with 5 degrees phase cluster in the first stage leads to a total resolution of more than 10 bits for the whole modulator. In the sense of the present invention, the intermediate signal comprises an only phase modulated signal or alternatively a complex modulated signal which means that phase and magnitude is modulated. The first gain stages A ¹ , and the second gain stages A ² are part of the additive interpolator. A gain stage in the sense of the present invention can comprise a simple switch and/or a dedicated amplifier for current and/or voltage gain. Preferably, the gain stages comprises the Digital-to- Analog-Circuitry in order to transform the digital input signal into the analog output signal. The input unit preferably comprises a multilevel outphasing signal component separator.

According to a preferred embodiment of the present invention, the second step comprises the sub-steps of enabling a number of first gain stages A ¹ , for the phase signal φ, and a num- ber of second gain stages A ² , for the phase signal φ, + Δφ and enabling only a number of first and second gain stages A ¹ , and A ² , corresponding to the phase and magnitude of the intermediate signal S,. It is herewith advantageously possible to interpolate phase and amplitude merely by enabling/disabling the first and second gain stages A ¹ , and A ² , as described above. According to another preferred embodiment of the present invention, the second step comprising the sub-steps of generating a coarse control signal CCS, in dependency of the phase of the intermediate signal S, by a signal processing unit and providing the coarse control signal CCSi to the cluster selection module and selecting the angular cluster C, on the basis of the coarse control signal CCS, _. The coarse control Signal CCS,. The coarse control signal CCS, advantageously allows a coarse estimation of the phase by selecting the corresponding cluster by providing the required phase information. Analogously, the third step comprises preferably the sub-steps of generating a fine control signal FCS, in dependency of the phase and the magnitude of the intermediate signal S, by a signal processing unit and providing the fine control signal FCSi to the additive interpolator and enabling the gain stages A' _n on the basis of the fine control signal FCS,. The first stage is controlled by the coarse control signal CCS, and the second stage is controlled by the fine control signal FCS,. In particular, the coarse control signal CCS, represents less resolution of the phase compared to the resolution of the fine control signal FCS, _, so that a coarse phase estimation is accomplished in the first stage and a precise interpolation of phase and magnitude is accomplished within the second stage. The interpolation of phase and magnitude in the second stage has merely to be done within the selected cluster. The advantage of this approach is that the two stages are independent from each other in terms of matching requirements or speed of operation. The two stages make it possible to modulate signals with sampling frequencies which can go beyond 1 GS/s. It is conceivable that the angular cluster C, covers an angular range of more than 5 degrees, preferably more than 10 degrees and particularly preferably more than 15 degrees in the constellation diagram. The angular cluster C, is preferably smaller than 45 degrees, particularly preferably smaller than 30 degrees and most particularly preferably smaller than 20 degrees.

Preferably, a series of phase-shifted signals are generated from a reference signal by a dis- crete phase generator, wherein the cluster C, is selected in that a certain phase-shifted signal is chosen by a multiplexer on the bases of the coarse control signal CCS, _. It is herewith advantageously possible to achieve very high switching speed. It is conceivable that the multiplexer is a single multiplexer or that the multiplexer is realized by multiple multiplexers. The number of output phase signals depends on the size of the clusters and defines the resolu- tion of the interpolation in the first stage because the more output signals are provided the smaller the difference between adjacent phase signals. In principle, any kind of phase gen- erator providing a set of discrete phases can be used. However, the discrete phase generator preferably comprises a single or multiple delay-locked loops (DLL), a phase-locked loop (PLL), a traveling wave oscillator with multiple signal taps, a frequency divider with multiple output phases or using direct digital synthesis (DDS). According to another preferred embodiment of the present invention, a first intermediate signal Si and a second intermediate signal S ₂ representing the complex digital input signal IN when combined with each other are provided by the multilevel outphasing signal component separator in the first step, a first angular cluster Ci located between by the angles φι and φι + Δφ containing the first intermediate signal Si in the constellation diagram and a second angu- lar cluster C ₂ located between φ ₂ and φ ₂ + Δφ containing the second intermediate signal S ₂ in the constellation diagram are selected by the cluster selection module in the second step, multiple gain stages A ⁿ -i for the respective signals φι and φι + Δφ of the selected first cluster Ci are operated in dependency of phase and magnitude of the first intermediate signal Si and multiple further gain stages A ⁿ ₂ for the respective signals φ ₂ and φ ₂ + Δφ of the selected second cluster C ₂ are operated in dependency of phase and magnitude of the second intermediate signal S ₂ by the additive interpolator in the third step, wherein the output signals from the multiple gain stages A ⁿ -i are added together to a first phase- and magnitude-modulated output signal SOi and wherein the output signals from the multiple further gain stages A ⁿ ₂ are added together to a second phase- and magnitude-modulated output signal S0 ₂ and the first phase- and magnitude-modulated output signal SOi and the second phase- and magnitude- modulated output signal S0 ₂ are combined by an outphasing module in a fourth step. It is herewith advantageously possible that the complex input signal IN is converted into the two phase-modulated or complex-modulated intermediate signals Si and S ₂ with constant envelope curve so that a vector addition of the two intermediate signals Si and S ₂ again yields the original input signal IN. The two intermediate signals Si and S ₂ thus have the same output level. In this way, the two intermediate signals Si and S ₂ can now be processed with high- efficiency saturated or switched amplifiers and the high efficiency of these amplifiers can be utilized.

Preferably, the first step comprises the sub-steps of providing an in-phase signal I and an quadrature phase signal Q of the complex digital input signal IN and determining the first intermediate signal Si and the second intermediate signal S ₂ representing the in-phase signal I and the quadrature phase signal Q of the complex digital input signal by the multilevel outphasing signal component separator. Preferably, the in-phase signal I and the quadrature phase signal Q are transformed into an angular component cp and an amplitude component A by a CORDIC module and wherein the first intermediate signal Si and the second intermediate signal S ₂ are calculated by the multilevel outphasing signal component separator. In par- ticular, the signal processing unit provides two coarse control signals CCSi and CCS ₂ , a first coarse control signal CCSi for selecting the first angular cluster Ci and the second coarse control signal CCS ₂ for selecting the second coarse control signal C ₂ . Analogously, the signal processing unit preferably provides two fine control signals FCSi and FCS ₂ , a first fine con- trol signal FCSi for enable the first gain stages A ¹ _! for the phase signal φι and the second gain stages A ² _! for the phase signal φι + Δφ and a second fine control signal FCS ₂ for enable the further first gain stages A ¹ ₂ for the phase signal φ ₂ and the further second gain stages A ² ₂ for the phase signal φ ₂ + Δφ. Preferably, wherein the signal modulator comprises an input unit for receiving the in-phase signal I and the quadrature phase signal Q, wherein the input unit comprises the CORDIC module.

According to a preferred embodiment of the present invention, the signal processing unit comprises an input for a configuration signal and is configured to modify the coarse control signal CCS, and the fine control signal FCSjn dependency of the configuration signal. It is herewith advantageously possible to configure the overall resolution of the signal modulator in accordance with the required specifications of wireless signal to be transmitted via the antenna. In principle, the maximum resolution of the modulator is determined by the configuration of the multiplexer and the number of gain stages A" connected in parallel, in particular the coarse control signal CCS, is determined by the configuration of the multiplexer and the fine control signal FCS, is determined by the number of parallel gain stages A" . However, the overall resolution of the modulator can be reduced below said maximum by modifying the coarse control signal CCS, and/or the fine control signal FCS, in such a manner that only a part of the multiplexer is used which means that the size of each cluster raises and/or that a reduced number of gain stages A" are used. This modification can be controlled by aid of the external configuration signal. According to a preferred embodiment of the signal modulator, the multilevel outphasing signal component separator is configured to generate a first intermediate signal Si and a second intermediate signal S ₂ representing the complex digital input signal IN, the cluster selection module comprises a first cluster selection module configured to select in the constellation diagram a first angular cluster Ci located between by the angles φι and φι + Δφ contain- ing the first intermediate signal Si, the cluster selection module comprises a second cluster selection module configured to select in the constellation diagram a second angular cluster C ₂ located between by the angles φ ₂ and φ ₂ + Δφ containing the second intermediate signal S ₂ , the additive interpolator comprises a first additive interpolator comprising multiple first gain stages A ⁿ -i and being configured to operate the multiple first gain stages A ⁿ -i for the re- spective phase signals φι and φι + Δφ of the selected first cluster Ci in dependency of phase and magnitude of the first intermediate signal Si, wherein the output signals from the multiple gain stages A ⁿ -i are added together to a first phase- and magnitude-modulated output signal SOi, the additive interpolator comprises a second additive interpolator comprising multiple second gain stages A ⁿ ₂ and being configured to operate the multiple second gain stages A ⁿ ₂ for the respective phase signals φι and φι + Δφ of the selected second cluster C ₂ in depend- ency of phase and magnitude of the second intermediate signal S ₂ , wherein the output signals from the multiple further gain stages A ⁿ ₂ are added together to a second phase- and magnitude-modulated output signal S0 ₂ and the signal modulator further comprises an out- phasing module configured to combine the first phase- and magnitude-modulated output signal SOi and the second phase- and magnitude-modulated output signal S0 ₂ . It is herewith advantageously possible to use the "outphasing approach", as described above.

According to the present invention, the subscript "i" in the respective denotation of gain stages A" , clusters C,, coarse control signal CCS,, fine control signal FCS,, output signal SO, and angle φ, indicates if the first channel allocated to the first intermediate signal or the second channel allocated to the second intermediate signal S _i=2 is meant, whereas the subscript "n" in the respective denotation of gain stages A" defines the n-th gain stage in each path. Conceptually, it is distinguished between multiple first gain stages A ¹ -i, multiple second gain stages A ² -i, multiple further first gain stages A ¹ ₂ and multiple further second gain stages A ² ₂ .

Another subject of the present invention is a base transceiver station for a mobile communication network comprising the signal modulator according to the present invention. These and other characteristics, features and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention. The description is given for the sake of example only, without limiting the scope of the invention. The reference figures quoted below refer to the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 illustrates schematically a signal modulator and method for modulating digital input signals according to an exemplary embodiment of the present invention.

Figure 2 illustrates schematically base transceiver station comprising the signal modulator according to the exemplary embodiment of the present invention.

Figure 3 illustrates schematically the signal processing unit and the outphasing principle of the signal modulator and the method according to the exemplary embodiment of the present invention. Figure 4 illustrates schematically the additive interpolator of the signal modulator according to the exemplary embodiment of the present invention.

Figure 5 illustrates schematically a constellation diagram containing the symbol to be transmitted as well as another constellation diagram containing a selected cluster in which the symbol is located.

Figure 6 illustrates schematically the mapped points in the constellation diagram reachable with the method and modulator according to the exemplary embodiment of the present invention.

Figure 7 illustrates schematically a signal modulator and method for modulating digital input signals according to another exemplary embodiment of the present invention.

Figure 8 illustrates simulation results of the signal modulator and method for modulating digital input signals according to the exemplary embodiment of the present invention.

DETAILED DESCRIPTION The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings describe the invention only schematically and non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. Where an indefinite or definite article is used when referring to a singular noun, e.g. "a", "an", "the", this includes a plural of that noun unless something else is specifically stated.

Furthermore, the terms first, second, third and the like in the description and in the claims are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. It is to be understood that the terms so used are inter- changeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described of illustrated herein.

In figure 1 , a signal modulator 1 performing a method for modulating complex digital input signals IN according to an exemplary embodiment of the present invention is schematically shown.

The signal modulator 1 comprises an input unit 1 1 , a cluster selection module 30 and an additive interpolator 40. The input unit 1 1 is configured to receive an in-phase signal I and a quadrature phase signal Q representing the complex digital input signal IN to be modulated. The input unit 1 1 comprises a multilevel component separator 10 determining an intermediate signal S, on the basis of the in-phase signal I and the quadrature phase signal Q. The intermediate signal S, is a phase-modulated or phase-and-magnitude-modulate signal with a discrete envelope curve.

The input unit 1 1 further comprises a digital signal processing unit 60 generating a coarse control signal CCS, in dependency of phase of the intermediate signal S, and a fine control signal FCS, in dependency of phase and magnitude of the intermediate signal S,. The input unit 1 1 is described in figure 3, in more detail. The coarse control signal CCS, is provided to the cluster selection module 30. The cluster selection module 30 comprises a phase generator 70 and a high-speed multiplexer 80. The phase generator 70 is fed with a carrier signal 72 having a certain frequency and provides the multiplexer 80 with a range of discrete phase's φ. The multiplexer 80 chooses the phase signals φ, and φ, + Δφ in dependency of the coarse control signal CCS,. By choosing the phase signals φ, and φ, + Δφ, the multiplexer selects a certain cluster C, within the constellation diagram 20, in which the modulation symbol to be transmitted is located. The size of the cluster C, corresponds to the value Δφ. The cluster selection module 30 is therefor provided for subdividing the constellation diagram 20 into certain angular clusters C, of equal size and selecting the cluster C, containing the modulation symbol to be transmitted. In this way, the cluster selection module 30 works as a coarse phase division.

The phase signals φ, and φ, + Δφ are provided to the additive interpolator 40. The additive interpolator 40 comprises a plurality of first gain stages A ¹ , for the phase signal φ, and a plurality of second gain stages A ² , for the phase signal φ, + Δφ. The gain stages A" are connected in parallel and each gain stage A" is provided with a switch for enabling or disabling cor- responding gain stage A" . The switches of the gain stages A" are operated in dependency of the fine control signal FCS, in order to precisely interpolate the position of the modulation symbol inside the selected cluster Q. For this purpose, an appropriate number of these first and second gain stages A ¹ ,, A ² , are enabled/disabled. More precisely, the overall number of enabled gain stages A ¹ ,, A ² refers to the distance of the modulation symbol from the origin in the constellation diagram 20, wherein the ratio between enabled first gain stages A ¹ , and enabled second gain stages A ² refers to the angle of the modulation symbol in the constellation diagram 20. It is conceivable that the first and second gain stages A ¹ ,, A ² are controlled by a single fine control signal FCS, or that the first gain stage A ¹ , is controlled by a first fine control signal FCS, and the second gain stage A ² is controlled by a second fine control signal FCSi. The output signals of the first and second gain stages A ² , are added together to phase- and magnitude modulated output signal SO,. For this purpose, the additive interpolator 40 is preferably connected to a load transformation network 90 and/or an appropriate signal/power combiner 91 . In principle, the above described signal modulator 1 consists of two separate stages. A first stage for roughly estimating the phase by selecting a certain cluster C, in the constellation diagram and a separated second stage for interpolating phase and magnitude within the selected cluster Q. As the interpolation has been done only in the limited cluster C,, the resolution in the second stage did not need to be as high as in conventional l-Q RFDAC's in order to achieve a high overall resolution. Furthermore, the two stages are independent from each other in terms of matching requirements or speed of operation.

The described signal modulator 1 is preferably used in a base transceiver station 100 for a mobile communication network using communication standards like e.g. UMTS (Universal Mobile Telecommunications System), LTE (Long Term Evolution) or NGMN (Next Generation Mobile Networks) in order to allow modulation of high bandwidth signals with high resolution, low complexity and low power consumption. A suchlike base transceiver station 100 is shown in figure 2.

In figure 3, the input unit 1 1 and the corresponding signal processing is shown in more detail. On the left-hand side, the circuitry of the input unit 1 1 is schematically illustrated, wherein the corresponding representation of the signals in the respective coordinate system is illustrated right beside on the right-hand side of figure 3. In the present exemplary embodiment, the input unit 1 1 comprises a CORDIC module 12 transforming into an angular component φ and an amplitude component A (using polar coordinates). The multilevel outphasing signal component separator 10 splits the polar complex vector into two intermediate signals Si and S ₂ with equal magnitude. The two intermediate signals Si and S ₂ represents the complex digital input signal IN when combined with each other. In the present example, multi-levelling is used which means that the magnitude of the two intermediate signals Si and S ₂ varies between different discrete levels in order to represent the modulation symbol of the complex input signal (cp. constellation diagram 20' on the far right side of figure 3). The signal processing unit 10 generates for each intermediate signal S, the coarse control signal CCSifor selection of the cluster C, by the cluster selection module 30 and the fine control signal FCS, for interpolation of phase and magnitude by the additive interpolator 40, as described above.

The two clusters Ci and C ₂ containing the respective intermediate signals Si and S ₂ are schematically illustrated by the grey areas in the upper constellation diagram 20". Another schematic drawing of the additive interpolator 40 is shown in figure 4. The first gain stages A ¹ , are fed with the first phase signal (fr and the second gain stages A ² , are fed with the second phase signal φ, + Δφ. Each gain stage A" of the first gain stages A ¹ , and the second gain stages A ² , are provided with a switch 43 for enabling or disabling the corresponding gain stage A" in dependency of the fine control signal FCS, in order to interpolate phase and magnitude of the modulation symbol inside the selected cluster C, located between the phases Φ, and Φ, + Δφ. The output signals of the plurality of gain stages A" are added together to generate the phase- and magnitude-modulated output signal SO, by means of an adder unit 44. The signal processing unit 60 furthermore comprises an input 61 for a configuration sig- nal. The coarse signal CCS, and the fine signal signal FCS, can be modified by the external configuration signal, so that only a reduced number of clusters having a bigger angular range and a reduced number of gain stages are used, e.g. in order to fulfil certain requirements of the wireless signal to be transmitted.

The constellation diagram 20 containing the modulation symbol to be transmitted in terms of polar coordinates is shown on the left side of figure 5, wherein the selection of a certain cluster Ci containing the modulation symbol by means of the cluster selection module 30 and the interpolation within the selected cluster C, by means of the additive interpolator 40 are illustrated in the constellation diagram 20 on the right side of figure 5. As a result of this approach, all mapped points in the constellation diagram 20 of figure 6 are, in principle, reach- able with high speed and high accuracy.

Figure 7 illustrates schematically a signal modulator 1 and method for modulating digital input signals according to another exemplary embodiment of the present invention. The signal modulator 1 comprises the input unit 1 1 , as explained on the basis of figure 3. The signal unit 1 1 separates the in-phase signal I and the quadrature phase signal Q of the complex digital input signal IN into the first intermediate signal Si and the second intermediate signal S ₂ . As described above, the digital processing unit 60 of the input unit 1 1 generates a first coarse control signal CCS-i for selection of the first cluster Ci containing the first intermediate signal Si and a first fine control signal FCSi in order to interpolate phase and magnitude of the modulation symbol inside the selected first cluster Ci _. Analogously, the digital processing unit 60 generates a second coarse control signal CCS ₂ for selection of the second cluster C ₂ containing the second intermediate signal S ₂ and a second fine control signal FCS ₂ in order to interpolate phase and magnitude of the modulation symbol inside the selected second cluster C _2.

The signal modulator 1 comprises two separate signal paths, one path for the first intermedi- ate signal Si (upper path in figure 7) and another path for the second intermediate signal S ₂ (lower path in figure 7). The first path comprises a first cluster selection module 30, as shown in figure 1 , for selecting the first cluster Ci in dependency of the first coarse control signal CCSi and afterwards a first additive interpolator 40, as explained on the basis of figures 1 and 4, for interpolating phase and magnitude inside the selected first cluster Ci located between the phases φι and φι + Δφ on the basis of the first fine control signal FCSi. Analogous- ly, the second path comprises a second cluster selection module 30, as shown in figure 1 , for selecting the second cluster C ₂ in dependency of the second coarse control signal CCS ₂ and afterwards a second additive interpolator 40, as explained on the basis of figures 1 and 4, for interpolating phase and magnitude inside the selected second cluster C ₂ located between the phases φ ₂ and φ ₂ + Δφ on the basis of the second fine control signal FCS ₂ . The respective first and second phase- and magnitude modulated output signal SOi, S0 ₂ of the first and second path are combined by means of an outphasing module 1 10 of the of the signal modulator 1 .

In figure 8, simulation results of the signal modulator 1 and method for modulating digital input signals according to the present invention are shown. The data results from a simula- tion of a signal modulator 1 with two 10 MHz LTE Channels in non-contiguous formation. The power/frequency (dB/Hz) is plotted on the Y axis, wherein the frequency (MHz) is plotted on the X axis. Composes spectra is shown versus interpolative stage effective resolution assuming a 5° phase cluster C, at the input of the second interpolative stage.