Title:
METHOD FOR POLISHING CARRIER PLATE, CARRIER PLATE, AND METHOD FOR POLISHING SEMICONDUCTOR WAFER
Document Type and Number:
WIPO Patent Application WO/2022/137934
Kind Code:
A1
Abstract:
Provided is a method that enables efficient polishing of upper and lower surfaces of a carrier plate which is used for double-side polishing step for a semiconductor wafer and that has not been used since manufacture. This method for polishing a carrier plate is characterized by: using, as a polishing pad in a double-side polishing apparatus, a polishing pad having on a surface thereof an abrasive-containing layer in which abrasive grains with a particle size of greater than or equal to 2 μm are embedded; holding a carrier plate to be polished that has not been used since manufacture between an upper surface plate and a lower surface plate of the double-side polishing apparatus; and polishing both sides of the carrier plate to be polished by supplying a polishing fluid while relatively rotating the carrier plate to be polished and the upper surface plate and the lower surface plate.
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Inventors:
MIKURIYA SHUNSUKE (JP)
TAKUBO SHINYA (JP)
TAKUBO SHINYA (JP)
Application Number:
PCT/JP2021/042696
Publication Date:
June 30, 2022
Filing Date:
November 19, 2021
Export Citation:
Assignee:
SUMCO CORP (JP)
International Classes:
H01L21/304
Domestic Patent References:
| WO2017159213A1 | 2017-09-21 |
Foreign References:
| JP2016198864A | 2016-12-01 | |||
| JP2020529332A | 2020-10-08 |
Attorney, Agent or Firm:
SUGIMURA Kenji (JP)
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