OSCILLATORS

TECHNICAL FIELD

The present invention relates to a system for realizing band calibration of a voltage controlled oscillator which generates signal having cycle frequency which is proportional to a control value in a control signal received as input and method where this system is applied.

PRIOR ART

Voltage controlled oscillators (VCO) are oscillators which generate signal at a specific frequency in accordance with the input voltage. Mobile devices may comprise VCOs related to the phase locked loop (PLL) circuits for communication by locking to a specific frequency. The speed of catching the correct band by the VCO directly affects the communication performances of cellular phones.

In the present art, linear adjustment can be realized for locking the frequency of VCO at the desired band. By means of linear adjustment, the desired frequency and the present frequency are compared and the frequency of VCO is increased and decreased in a stepped manner until the desired frequency is obtained. However, in VCOs which have high amount of band, it takes time to lock to the desired frequency.

In the application with number US2003048139, in order to lock the frequency of VCO at the desired band, the VCO of a synthesizer operates with a coarse tuning and a fine tuning. During the coarse tuning, a binary search method is used to match the VCO frequency to one of a finite number of discrete reference frequencies. The coarse tuning operates without frequency division and phase comparison in a closed feedback loop, thereby speeding up the settling time and increasing the lock-in range. When the correct band is found, this increasing or decreasing is realized at lower steps until the correct frequency value is obtained. Even if the double search method is more rapid than the linear adjustment method, since completion of the search includes pluralities of tests in VCOs having high amount of band, the time for locking to the desired frequency also increases. As a result, because of all of the abovementioned problems, an improvement is required in the related technical field.

BRIEF DESCRIPTION OF THE INVENTION

The present invention relates to a system and method, for eliminating the above mentioned disadvantages and for bringing new advantages to the related technical field.

An object of the present invention is to provide a system and method which provide accelerated locking of the voltage controlled oscillator to the desired frequency.

Another object of the present invention is to provide a system and method which provide accelerated locking of the voltage controlled oscillator to the desired frequency in changing environmental conditions like temperature and humidity.

In order to realize all of the abovementioned objects and the objects which are to be deducted from the detailed description below, the present invention is a system for realizing band calibration of a voltage controlled oscillator which generates signal having cycle frequency which is proportional with a control value in a control signal received as input. Accordingly, the improvement is that a band adjustment unit is provided; said band adjustment unit is embodied to send as input the control signal, accommodating a beginning control value which corresponds to a desired cycle frequency, to the voltage controlled oscillator; a high speed counter is provided which is configured to count the clock cycle of the voltage controlled oscillator during at least one reference cycle of a reference clock and to form a first cycle count; a first combinational logic unit is provided which is embodied to receive said first cycle count as input and to output a first control value which corresponds to the first cycle count; a second combinational logic unit is provided which is embodied to receive the desired cycle count as input and to output the beginning control value which corresponds to the desired cycle count; a first comparator is embodied to compare the first control value and the beginning control value and to form a difference value; said band adjustment unit is embodied to update the control signal by changing the beginning control value at an amount equal to this difference value for each difference value received from the comparator during predetermined number of reference cycles and to update the control signal by changing the control value linearly according to the sign of the difference value after predetermined number of reference cycles. The control signal is changed at an amount which is equal to the shift amount led by the medium conditions and additionally sensitive adjustment can be provided. Thus, by using this system, the sensitivity is preserved, and the desired band can be jumped to in a much more rapid manner when compared with the systems using the double search method.

In a preferred embodiment of the present invention, a second comparator is provided which is configured to compare the first cycle count received as input and the desired cycle count and to send a signal, which controls protection of the present control value, to the band adjustment unit in case the difference in between is within a predetermined tolerance range.

In a preferred embodiment of the present invention, said second comparator is positioned on the connection between the high speed counter and the first combinational logic unit and is embodied to permit transfer of the first cycle count to the first combinational logic unit in case the difference between the first cycle count and the desired cycle count exceeds a predetermined tolerance range.

In a preferred embodiment of the present invention, in order to divide clock cycle of the voltage controlled oscillator, a frequency divider is provided connected to the voltage controlled oscillator and the high-speed counter. Thus, the sensitivity of the system can be adjusted.

In a preferred embodiment of the present invention, the band adjustment unit is configured to receive the beginning control value from the second combinational logic unit.

The present invention is moreover a method for realizing band calibration of a voltage controlled oscillator which generates signal having cycle frequency which is proportional to a control value in a control signal received as input. Accordingly, the subject matter method is characterized by comprising the steps of determining a beginning control value which corresponds to a desired cycle count, inputting the control signal, comprising said beginning value as the control value by a band adjustment unit, to the voltage controlled oscillator, counting the clock cycle of the voltage controlled oscillator by a high speed counter during at least one reference cycle of a reference clock and forming a first cycle count, determining a first control value which corresponds to the first cycle count, determining a first difference value between the first control value and the beginning control value, updating the control signal by the band adjustment unit by means of increasing or decreasing the present control value which is equal to the difference value.

In a preferred embodiment of the present invention, the following steps are repeated during the predetermined number of cycles respectively:“counting the clock cycle of the voltage controlled oscillator by a high speed counter during at least one reference cycle of a reference clock and forming a first cycle count”, “determining a first control value which corresponds to the first cycle count”,“determining a first difference value between the first control value and the beginning control value” and“updating the control signal by the band adjustment unit by means of increasing or decreasing the present control value which is equal to the difference value”. Thus, time loss of the system in consecutive positive and negative target exceed values in the vicinity of the desired cycle value is prevented.

In a preferred embodiment of the present invention, after predetermined cycle count, if the difference between the first cycle count and the desired cycle count is outside of a predetermined tolerance range, the control value is increased or decreased in a linear manner with respect to the sign of the first difference value until the difference between the first cycle count and the desired cycle count enters into said tolerance range by the band adjustment unit. Thus, after consecutive positive and negative target exceeding values, sensitive adjustment is realized and the desired cycle count is obtained in a short time.

In a preferred embodiment of the present invention, said cycle count is 3.

In a preferred embodiment of the present invention, after the step of“counting the clock cycle of the voltage controlled oscillator by a high speed counter during at least one reference cycle of a reference clock and forming a first cycle count”, the following steps are provided:

- comparing the first cycle count and the desired cycle count,

- preserving the present control value in case the difference between the first cycle count and the desired cycle count is within a predetermined tolerance range and“counting the clock cycle of the voltage controlled oscillator by a high speed counter during at least one reference cycle of a reference clock and forming a first cycle count”.

Thus, when the desired frequency value is obtained, locking of the system is provided.

BRIEF DESCRIPTION OF THE FIGURES

Figure 1 is a representative view of the system.

DETAILED DESCRIPTION OF THE INVENTION

In this detailed description, the subject matter is explained with references to examples without forming any restrictive effect only in order to make the subject more understandable. The present invention is a system related to said voltage controlled oscillator (100) provided for realizing frequency calibration of a voltage controlled oscillator (100) and a method where this system is applied. The voltage controlled oscillator (100) can be provided in a phase locked loop (PLL) circuit (not illustrated in the figures).

With reference to Figure 1 , in an exemplary embodiment, a band adjustment unit (200) controls the cycle frequency of the signal generated by the voltage controlled oscillator (100). In more details, the band adjustment unit (200) sends a control signal to the voltage controlled oscillator (100). Said control signal comprises a control value and the voltage controlled oscillator (100) changes the cycle frequency of the signal generated according to this control value. In this exemplary embodiment, the voltage controlled oscillator (100) is a LC VCO. The voltage controlled oscillator (100) may comprise capacitor banks (not illustrated in the figures). For instance, the control value can be a value like 300 and accordingly, the cycle count in a reference clock cycle of the signal generated by the voltage controlled oscillator (100) can be 1000.

The voltage controlled oscillator (100) is related to a high speed counter (300). Said high speed counter (300) counts the clock cycle of the voltage controlled oscillator (100). This clock cycle frequency is proportional with the signal frequency generated by the voltage controlled oscillator (100). In more details, the high speed counter (300) counts the cycles in a cycle of a reference clock of the voltage controlled oscillator (100) and forms a first cycle count. The reference clock can be the clock of the high speed counter (300).

A first combinational logic unit (510) is related to the high speed counter (300). Said first combinational logic unit (510) receives the cycle count, received from the very rapid counter, as input and outputs a first control value corresponding to this cycle count.

A second combinational logic unit (520) is embodied to receive a desired cycle count as input and to output a beginning control value corresponding to this cycle count. The first combinational logic unit (510) and the second combinational logic unit (520) are logic circuits which give output in a pre-adjusted manner according to the received input values.

A first comparator (410) receives as input the first control value and the beginning control value. The first comparator (410) is embodied to output a difference value which describes the difference between the first control value and the beginning control value. The band adjustment unit (200) is related to the first comparator (410) in a manner receiving the difference value formed by the first comparator (410). The band adjustment unit (200) adds the difference value and the control value or subtracts the difference value from the control value and is embodied to update the control signal. The band adjustment unit (200) moreover updates the control signal in accordance with the size of the consecutive difference value along the predetermined cycle count, and after predetermined number of cycles, it increases or decreases the control value in a stepped manner according to the sign of the difference value. Thus, during the first few cycles, the control value is updated in a proportional manner with the difference in between and if the desired cycle count has not been obtained, it is brought to this value in a stepped manner.

The subject matter system also comprises a second comparator (420). Said second comparator (420) is embodied to receive the desired cycle count and the first cycle count as input and to compare these. The second comparator (420) is embodied to send a signal, which controls protection of the present control signal, to the band adjustment unit (200) if the difference between the desired cycle count and the first cycle count is within a predetermined tolerance range.

Said system also comprises a frequency divider (450) related to the voltage controlled oscillator (100) and the very rapid counter. Said frequency divider (450) divides the signal of the voltage controlled oscillator (100) clock.

The band adjustment unit (200) can access the beginning control value, corresponding to the desired frequency value, through a table or through a lookup table. Said lookup table can be a combinational logic circuit. The lookup table or lookup tables has/have been obtained beforehand as a result of experiments or calculations. These lookup table or tables comprise(s) control values which correspond to the cycle count. However, since the medium conditions and the condition of the circuit elements change, the voltage controlled oscillator (100) may not produce the cycle count, existing in the lookup table, corresponding to the control value received. Instead of this, it generates signal with a cycle count which is slightly shifted from the cycle count corresponding to the control value in accordance with the medium conditions and in accordance with the conditions of the circuit elements.

The operation of this exemplary embodiment of the system whose details are described above is as follows: The subject matter system can provide band calibration of a voltage controlled oscillator (100) related to PLL circuit of a mobile telephone. When the mobile telephone selects a band for communication, the desired cycle count is transferred as input to the band adjustment unit (200) for locking of PLL to this band. The band adjustment unit (200) sends the control signal, comprising the control value which corresponds to this cycle count, from a lookup table to the voltage controlled oscillator (100) (for instance, the desired cycle count can be 1000 and the corresponding cycle count can be 300). The voltage controlled oscillator (100) generates signal by configuring capacitor banks in accordance with this control value. The high-speed counter (300) determines a first cycle count in a cycle of the own clock of the signal generated by the voltage controlled oscillator (100) (for instance, the first cycle count is 1200). The second comparator (420) receives said cycle count and the desired cycle count as input and compares these. If the difference in between is within a predetermined tolerance range, it commands the band adjustment unit (200) to protect the present control signal and if the difference in between is not within a predetermined tolerance range, it transfers said first cycle count to the first combinational logic unit (510). The first combinational logic unit (510) receives the cycle count as input and outputs the first control value (for instance 350) corresponding to this value. The second combinational logic unit (520) outputs the control value (for instance, 300) corresponding to the desired cycle count. The first comparator (410) compares the first control value and the beginning control value and forms a different value (for instance; 50 in accordance with the abovementioned examples). The band adjustment unit (200) adds this difference value to the present control value or subtracts this difference value from the present control value (for instance, 300-50=250) and updates the present control value and the control signal. Thus, the control value is changed at an amount which is equal to the shift which occurs due to environmental conditions. The band adjustment unit (200) updates the control signal in accordance with the difference values coming from the first comparator (410). After three cycles, even if the command for protecting the present adjustments has not arrived from the second comparator (420), the control value is increased or decreased in a linear and stepped manner according to the sign of the difference value (For instance; 251 , 252, 253, ...). Thus, a rapid locking is provided to the desired cycle count. By means of this system and method, locking can be provided to the desired cycle count within duration lower than 1 micro second.

The protection scope of the present invention is set forth in the annexed claims and cannot be restricted to the illustrative disclosures given above, under the detailed description. It is because a person skilled in the relevant art can obviously produce similar embodiments under the light of the foregoing disclosures, without departing from the main principles of the present invention. REFERENCE NUMBERS

100 Voltage controlled oscillator 200 Band adjustment unit

300 High speed counter

410 First comparator

420 Second comparator

450 Frequency divider

510 First combinational logic unit 520 Second combinational logic unit