A DIFFUSION POTENTIAL OF A DIFFUSIVE PROPERTY

TECHNICAL FIELD

[0001] The present disclosure is directed at methods, systems, and techniques for estimating a diffusion potential, such as a thermal potential (colloquially referred to as "temperature"), of a diffusive property, such as thermal energy (colloquially referred to as "heat"). More particularly, the present disclosure is directed at estimating a diffusion potential obeying linear diffusion; that is, a diffusion potential whose gradient is a force that is linearly proportional to the flux of the underlying diffusive property.

BACKGROUND

[0002] Linear diffusion under various names is used to describe the flux of different diffusive properties. For example, Fick's law describes diffusion of a number of molecules of one gas species within a mixture of several species (the potential is called the concentration or partial pressure); Ohm's law describes the diffusion of electric charge (the electric flux is called electric current, the electric potential is called the voltage); and Fourier's law describes the diffusion of heat in conductors (the thermal potential is called the temperature). The constant of proportionality between the gradient and the flux is called the conductance, e.g. thermal conductance in Fourier's law and electrical conductance in Ohm's law, or diffusivity in Fick's law. [0003] In particular, the effects of heat and its diffusion are becoming increasingly problematic when manufacturing and using integrated circuits (ICs). The dimensions of ICs manufactured using complementary metal-oxide semiconductor (CMOS) technology continue to shrink, which increases their power density. As ICs shrink, their power density tends to increase for two reasons. First, the ICs generally shrink at a rate that is faster than the rate at which their supply voltages decrease. Second, the frequency at which ICs are operated tends to increase as they shrink, resulting in increasing power losses related to high frequency switching. [0004] Research and development accordingly continue into techniques to address the problems that heat and its diffusion pose to ICs. More generally, research and development continue into ways to more generally apply theories describing linear diffusion to solve various problems. SUMMARY

[0005] According to a first aspect, there is provided a method for estimating a diffusion potential of a diffusive property. The method comprises modeling as a circuit a diffusion region comprising two subregions to which the diffusive property is introduced at different rates and through which the diffusive property linearly diffuses, wherein the nodes of the circuit comprise a dividing node dividing branches of the circuit modeling the two subregions and wherein a circuit potential at one of the nodes of the circuit corresponds to the diffusion potential at a location within the diffusion region; and estimating the diffusion potential at the location within the diffusion region by simulating operation of the circuit and determining the circuit potential at the one of the nodes of the circuit.

[0006] The diffusive property may be steady-state temperature. The diffusion region may be a pinched-off channel of a MOSFET

[0007] The circuit may be any one of an electric circuit, a hydraulic circuit, and a thermal circuit. [0008] When an electric circuit is used to thermally model the channel, the circuit may comprise a voltage source connected between a common node and the dividing node, the dividing node corresponding to the pinch-off point of the channel; and source and drain branches each connected in parallel between the pinch-off node and the common node. Each of the source and drain branches comprises a first resistor having one end connected to the pinch-off node; and a parallel branch comprising a current source and a second resistor connected together in parallel, the parallel branch connected in series between the other end of the first resistor and the common node. [0009] The node between the first resistor of the source branch and the parallel branch of the source branch may correspond to the source end of the channel, and the node between the first resistor of the drain branch and the parallel branch of the drain branch may correspond to the drain end of the channel. [0010] Portions of the MOSFET between the source and drain ends of the channel and a source netlist node and a drain netlist node of the MOSFET may be respectively modeled as a source netlist branch and a drain netlist branch each comprising a pair of current sources; and a resistive pi network connected in parallel between the pair of current sources, wherein the pair of current sources and the resistive pi network of the source netlist branch are connected in parallel across the source branch and the pair of current sources and the resistive pi network of the drain netlist branch are connected in parallel across the drain branch.

[0011] The node between the first resistor of the source branch and the parallel branch of the source branch may correspond to a source netlist node of the MOSFET, and the node between the first resistor of the drain branch and the parallel branch of the drain branch may correspond to a drain netlist node of the MOSFET.

[0012] Following estimating the diffusion potential at the location within the diffusion region, the method may also comprise analytically determining the diffusion potential at an additional location within the diffusion region that corresponds to positions between the nodes of the circuit.

[0013] Each of the nodes of the circuit may correspond to the diffusion potential at a different location within the diffusion region.

[0014] The diffusive property may be introduced to the diffusion region by being generated within the diffusion region. Alternatively or additionally, the diffusive property may be introduced to the diffusion region by being transported to the diffusion region.

[0015] According to another aspect, there is provided a method for estimating temperature within a pinched-off channel of a MOSFET. The method comprises modeling the thermal properties of the channel as an electric circuit comprising a dividing node corresponding to the pinch-off point of the channel and branches modeling subregions of the channel separated from each other by the pinch-off point, wherein a voltage at one of the nodes of the circuit corresponds to the temperature at a location within the channel; and estimating the temperature at the location within the channel by simulating operation of the circuit and determining the voltage at the one of the nodes of the circuit.

[0016] According to another aspect, there is provided a system for estimating a diffusion potential of a diffusive property. The system comprises a controller; and a computer readable medium, communicatively coupled to the controller, having encoded thereon statements and instructions to cause the controller to perform a method according to any aspects described above.

[0017] According to another aspect, there is provided a computer readable medium having encoded thereon statements and instructions to cause a controller to perform a method according to any aspects described above.

[0018] This summary does not necessarily describe the entire scope of all aspects.

Other aspects, features and advantages will be apparent to those of ordinary skill in the art upon review of the following description of specific embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS [0019] In the accompanying drawings, which illustrate one or more exemplary embodiments:

[0020] Figures 1 (a) and (b) are schematics of layouts of MOSFETs to which an embodiment of a method for estimating a diffusion potential can be applied.

[0021] Figure 2 is a schematic of a resistor illustrating heat flux entering and leaving a differential slice of the resistor.

[0022] Figure 3 is a sectional view of an nMOSFET to which an embodiment of the method referred to in respect of Figures 1 (a) and (b) can be applied. [0023] Figure 4 shows a conductive channel of the nMOSFET of Figure 3.

[0024] Figure 5 shows a portion of the channel of Figure 4 from the source end of the channel to the pinch-off point of the channel.

[0025] Figure 6 shows a portion of the channel of Figure 4 from the pinch-off point of the channel to the drain end of the channel.

[0026] Figure 7 shows an embodiment of an M-Network, used to thermally model the channel of Figure 4.

[0027] Figure 8 shows a method into which reliability verification can be incorporated, according to another embodiment. [0028] Figure 9 shows the layout of an exemplary nMOSFET.

[0029] Figures 10(a) to (j) are graphs of channel temperature vs. channel length of the nMOSFET of Figure 9, generated in accordance with one embodiment of the method referred to in respect of Figures 1(a) and (b).

[0030] Figures 11 and 12 are schematics of an embodiment of the M-Network used to thermally model the channel, source and drain of a MOSFET.

[0031] Figure 13 is an embodiment of a method for estimating a diffusion potential.

[0032] Figure 14 is an embodiment of a system for estimating a diffusion potential. DETAILED DESCRIPTION

[0033] Directional terms such as "top", "bottom", "left", "right", "front", and

"rear" are used in the following description for the purpose of providing relative reference only, and are not intended to suggest any limitations on how any article is to be positioned during use, or to be mounted in an assembly or relative to an environment. [0034] Electromigration in ICs can prejudice their reliability. Electromigration refers to the migration and resulting degradation of portions of metallic conductors over time in response to both current flowing through the conductors and to relatively high temperatures to which the conductors are exposed. Since current flowing through a conductor generates heat, high temperatures and current are unfortunately closely linked in practice.

[0035] The degree to which ICs are susceptible to electromigration depends on their layout. Accurately predicting the effect an ICs layout will have on its operating temperature can be difficult. Unfortunately, if a problem with an ICs layout is found only after tape-out, the costs in terms of both time and money of subsequently changing the layout to rectify the problem are relatively high.

[0036] Some of the embodiments discussed herein are directed at a method and system for estimating thermal potential, also referred to herein as "temperature", of thermal energy, also referred to herein as "heat". These embodiments use a type of electric circuit model referred to as an "M -Network" to model the heat generation and subsequent diffusion that occur within the channel of a MOSFET. The M-Network can accordingly be used to determine the steady-state (DC) temperature at various points within the channel.

[0037] However, in alternative embodiments, the diffusion potentials of different types of diffusive properties may be estimated, so long as the diffusive property is introduced to at least two subregions within the region through which the diffusive property may diffuse ("diffusion region"), and so long as the diffusive property diffuses linearly through the diffusion region. For example, in one alternative embodiment a tube of length L is open at both ends and has an inner surface that is coated for half its length with a catalyst. The tube is filled with a reactive gas and sustains a chemical reaction on its interior surface that releases a gaseous product. If the tube forms part of a larger system of connected tubes, it may be convenient to model the tube as a single entity with two ends. The rate of generation of the gaseous product and its concentration, which is the diffusion potential, results from chemical activity within one subregion of the tube that corresponds to the portion of the tube coated with the catalyst, whereas the uncoated portion of the tube corresponds to another subregion. Fluxes of gaseous product diffusing out of the two ends of the tube are unequal. In this example, the underlying diffusive property is the number of particles of the gaseous product. Additionally, in an embodiment in which the tube is open to the atmosphere at both ends, the concentrations of gaseous product, measured in ppm, differ at the two ends of the tube. In another alternative embodiment, a long iron bar is fixed at both ends to permafrost, but one end of the bar is in shadow and the other is exposed to sunlight. Heat is accordingly introduced to the subregion that corresponds to the portion of the bar exposed to sunlight, while the other subregion of the bar is the portion that is in the shadow. Differing amounts of heat are conducted through the two ends of the bar into the bodies that anchor it, making one side more likely to melt the permafrost. In this embodiment, the temperature of the bar if the diffusion potential and the diffusive property is heat. In another alternative embodiment, fertiliser is transported into (e.g.: via seeping) a sluggish stream at a point and diffuses unevenly into the water, leading to an algae growth rate that is greater downstream than upstream. The diffusion potential in this example is the concentration of algae in grams per litre, while the diffusive property is the number of particles of algae. One subregion of the stream is upstream from the point at which the fertiliser seeps into the stream, while the other subregion is downstream. In another alternative embodiment, an electrically-conducting wire that acts as a resistor and across which a fixed voltage is maintained by an external circuit is vertically embedded in a porous dielectric insulator, the lower end of which is soaked in water, such that some electrical current leaks to electrical ground through the soaked, lower portion of the insulator. If the water level in the soaked insulator rises, even more electric current leaks out of the wire. In this embodiment, the diffusion potential is voltage, the diffusive property is electric charge, one subregion is the lower end of the insulator, while the other subregion is the end of the insulator that is not soaked in water.

[0038] As an example of one embodiment, the following discussion describes how to estimate temperature (i.e. thermal potential) at various locations within a MOSFET. Figures 1(a) and (b) show layouts of exemplary MOSFETs 100 that are referred to in this discussion. The MOSFET 100 in Figure 1(a) includes a source 102, a drain 108, and a gate 106 located between the source 102 and drain 108. When the MOSFET 100 is in operation, a channel 104 (not shown in Figure 1(a), but shown in Figure 3) conducts current between the source 102 and drain 108. The end of the channel 104 closest to the source 102 is referred to as the source end 110 of the channel 104, while the end of the channel 104 closest to the drain 108 is referred to as the drain end 1 12 of the channel 104. When the MOSFET 100 is operating in saturation mode, the pinch-off point 1 14 of the channel 104 is between the source and drain ends 1 10,112. Figure 1(a) also identifies where, for the purposes of a common list of two-port networks (commonly referred to as a "netlist") and for circuit simulation using a simulator such as SPICE, the nodes representing the source 102 and drain 108 of the MOSFET are: one location 1 16 on the source 102 represents the netlist node for the source 102 ("source netlist node 1 16"), while another location 1 18 on the drain 108 represents the netlist node for the drain 108 ("drain netlist node 1 18").

[0039] Figure 1(b) shows two series, or stacked, MOSFETs 100'. The MOSFETs

100' include the source 102, drain 108, gate 106, source netlist node 1 16, and drain netlist node 118 of the MOSFET 100 shown in Figure 1(a), and also include another gate 106' having its own channel (not shown) with its own source end 110', drain end 112', and pinch-off point 114'. Heat diffusion in both the channel of the MOSFET 100 in Figure 1(a) and the channels of the stacked MOSFETs 100' of Figure 1(b) can be estimated using the embodiments developed and discussed in this disclosure. [0040] Figure 3 shows an n-type MOSFET 100 of similar layout as that of Figure

1(a). The MOSFET 100 of Figure 3 is operating in saturation mode. In addition to showing the source 102, gate 106, and drain 108, the asymmetric nature of the channel 104 is evident. The source end 1 10 of the channel 104 has the largest cross-sectional area of any cross-section of the channel 104, and the cross-sectional area shrinks until the channel 104's pinch-off point 1 14. Figure 3 also shows the MOSFET 100's substrate 306, an oxide layer 300 between the gate 106 and the channel 104, and vias 302 connected to the source 102, gate 106, and drain 108.

Heat Equation [0041] Before modeling the channel 104, a model for heating in a resistor 200, as shown in Figure 2, is derived. For the purposes of this model, the resistor 200 is presumed to be of uniform width and composition, and to have constant temperature over any cross-section taken perpendicular to its length. [0042] The heat per unit length in a differential slice of the resistor 200 is mC _p T(x)Ax , where the length of the differential slice is Ax , T(x) is the temperature along the resistor 200's length, m is the mass of the resistor 200 per unit length, and C _p is the heat capacity of the resistor 200. The time rate of change of the heat is then given by

3T

mC _p — Ax = F(x + Ax) - F(x) + < (x)Ax - f(x)Ax (1) dt where F(x) is the diffusive heat flux. The heat flux is oriented along the resistor 200's length and is related to the temperature gradient by Fourier's law of heat conduction:

F(x) = G' ^ong (2)

dx where G ^long is the longitudinal thermal conductance of the resistor 200. [0043] The Joule heat generated per unit length of the resistor 200 is given by φ - I _r ² _ms R ; R is the resistor 200's electrical resistance per unit length, which is assumed to be constant within the resistor 200, and I _rms is the time-averaged rms current flowing through the resistor 200. The function / (x) in Equation 1 models the heat flux through the sides of the resistor 200 to the environment, which is at a reference temperature T ^ret .

If diffusive heat flux passes through the sides of the resistor 200 to the environment, which is held constant at the reference temperature T ^rej (established, for example, by a full-chip temperature simulation including device heating), then a lateral thermal conductance G ^lat per unit length of the resistor 200 may be defined as follows: f(x) = G ^,a 'T(x) - T ^ref (3) Heat Generation in MOSFETs

[0044] When the MOSFET 100 is on and is in operation, charge carriers move from the source 102 to the drain 108 and in this process lose energy due to processes such as collisions, scattering, phonon-electron interaction, etc. The dissipated energy is released in the form of heat and leads to an increase in the MOSFET 100's temperature. As mentioned above in respect of Figure 3, when the MOSFET 100 is operating in saturation mode the channel 104 is asymmetric and decreases in cross-sectional area from its source end 1 10 to the pinch-off point 1 14. Between the pinch-off point 114 and the drain end 112 the channel 104's cross-sectional area is roughly constant. The discussion above concerning the resistor 200 can be applied to the channel 104 by modeling the channel 104 as a resistor of variable cross-sectional area. Heat generated in the channel 104 by current flow can be approximated as Joule heating analogous to what occurs in the resistor 200.

[0045] As discussed below, the one-dimensional heat equation (Equation 1) can be applied to the thermal model of the MOSFET 100 and solved analytically to give a closed-form expression for the temperature of the channel 104 from the source end 110 to the drain end 112. The embodiments discussed herein use the BSIM3 MOSFET model as created by the BSIM Group in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley, and are applicable to technology nodes equalling or exceeding 180 nm. However, in other embodiments (not depicted) alternative semiconductor models can be used as well, and technology nodes less than 180 nm may be modeled. Additionally, while the present disclosure is directed at modeling diffusion within the channel 104 of the n-type MOSFET 100, in alternative embodiments different types of transistors may be modeled. For example, p-type MOSFETs, HEMTs, BJTs, and FinFETs may be modeled.

Channel Geometry for Thermal Model

[0046] Figure 4 shows the channel 104 of the MOSFET 100. In the saturation region of operation the channel 104 shrinks near the drain end 1 12 and the drain current becomes almost constant with respect to Ia _s . The drain current flows through the depletion region at the drain end 1 12. When the MOSFET 100 is operating in saturation mode the channel is modeled as comprising two separate regions, Subregion 1 and

Subregion 2.

[0047] As shown in Figure 5, Subregion 1 is a channel of constant width W _eff and non-uniform height which tapers from the source end 1 10 to the pinch-off point 114. This subregion is approximated by an exponential function of the form y = Ae ^' " where y is the height and x is the length of the channel 104. An exponential function is selected for the model to lead to tractable analytic results. The parameters A and a in the exponential function are determined from the BSIM3 model parameters and correspond to the operating point of the MOSFET 100.

[0048] If L _x is the length of the channel 104 between the source end 110 and the pinch-off point 1 14, H ₀ is the height of the channel 104 at the source end 110 and H _p is the height of the channel 104 at the pinch-off point 114, then x = L _x ^> y = H _p y = H ₀ e (4) [0049] Figure 6 depicts Subregion 2 of the channel 104, which corresponds to the portion of the channel 104 between the pinch-off point 1 14 and the drain end 112. In this subregion, the channel 104 cross-section is uniform and has width W _eff and height H _p .

The length of Subregion 2 is denoted as L ₂ . Electrical Resistance [0050] The resistance of Subregion 1 can be approximated by integrating the resistance of a differential slice of the channel 104 from the source end 1 10 to I, :

where

p = Electrical resistivity

H ₀ = Height of the channel 104 at the source end 110

H _p = Height of the channel 104 at pinch-off point 114

W _efr = Effective with of the channel 104

L _{ = Length of the channel 104 between the source end 110 and the pinch-off point 114

L ₂ = Length of the channel between the pinch-off point 114 and the drain end 112 L _eff = Effective length of the channel 104

The effective length and width of the channel 104 can be approximated

w eff = w Drawn - 2d ^u W"

W W W

dW = W. + ' + " + — ^

L ^w " ^> W ^w ™ L ^W >" W ^W ™

Λ = «+ L '- ⁺ - W ¹ - ⁺ - Lπ '" W "- ^' " where

^L Dm™ ⁼ Layout drawn length of the MOSFET 100 W _Drmm = Layout drawn width of the MOSFET 100

are BSIM3 parameters

[0052] The electrical resistivity of the channel 104 can be approximated as

1

where

C _ox = Capacitance of the oxide layer 300

μ _ff = Effective mobility of charge carriers

[0053] Subregion 2 has a uniform cross-sectional area. This can be considered a uniform bar of length L ₂ , width W _eff , and height H _p . Its resistance is given by:

Channel Height Models

[0054] The height of the channel 104 at the source end 1 10 can be approximated as the thickness of the inversion layer:

where

k = Boltzmann's constant

T = Temperature

ε - Dielectric constant

ε ₀ = Permittivity of free space

q = Electron charge

N ₄ = Substrate doping concentration n _i = Intrinsic silicon concentration

</> _s - Surface potential

[0055] The height of the channel 104 at the pinch-off point 1 14, H _p , can be approximated as follows:

R _{l +} R ₂ = *f- sat p(e ^aL > -\) pL ₂ _ V _L DS

W ^rr eff H ^{1 1} 0 a ^U/ W ^rr eff H ^{1 1} P I ¹ sat

Under the approximation H _p «< H ₍

where

I _sat = Electric current in saturation region of operation

V _DS = Drain-Source voltage

[0056] The height of the channel 104 at the drain end 112 is modeled to be the same as at the pinch-off point, H _p , as it is assumed that the channel 104 is uniform from the pinch-off point 1 14 to the drain end 112.

Channel Length Models

[0057] The length of the channel 104 between the pinch-off point 1 14 and the drain end 1 12 is

where

VDS' = v _sat L _eff l _eff

v _sat = Saturation velocity of charge carriers

[0058] The length of the channel 104 between the source end 1 10 and the pinch- off point 1 14 is accordingly

(19)

Thermal Conductance

[0059] The channel 104 has both a lateral thermal conductance and longitudinal thermal conductance. The substrate 306 is modeled as having a uniform background temperature T ^re ' . The lateral thermal conductance is taken relative to both the gate 106 above and a thermal reference in the substrate 306 below. These are combined into a single lateral conductance for a single, average reference temperature. When compared to the temperature of the substrate 306, which acts as a relatively distant reference temperature, the relatively small variation in the height of the channel 104 compared to the distance to the source of the reference temperature is negligible. Therefore, the variation of thermal conductance along the height of the channel 104 is modeled as being negligible. The lateral thermal conductance ( G ^lat ) is modeled as being uniform along the length of the channel 104. In alternative embodiments, for complex MOSFET structures a uniform, effective lateral thermal conductivity can be calibrated from detailed 2D or 3D thermal conduction simulations. [0060] The longitudinal thermal conductance ( G ^long ) varies along the length of the channel 104 with the channel 104's cross-sectional area. The average longitudinal thermal conductance is

Qlong 1 Mf

avg — I G(x)dx (20)

L 'elf where L is the effective channel length.

[0061] The longitudinal thermal conductance along the channel 104's length is

G' ^ong (x) = G ₀ e' (21) where

G ₀ = Thermal conductance per unit length at the source end 1 10 (i.e. when

x = 0 G' ^ons (x = 0) = G _o ).

G _L = Thermal conductance per unit length at the drain end 1 12 (i.e. when

x = L ^ G'°" ^s (x = L) = G _L ) and where

Qlong eff

avg - 1 (22)

'eff

W.

[0062] If λ is the thermal conductivity of channel, then G ₀ = eff A

λ

H _P W _ej

λ

Solution of the Heat Equation

[0063] The heat equation, Equation 1, is solved for both Subregions 1 and 2 below.

Subregion I: Non-uniform cross-sectional area

[0064] Figure 5 shows Subregion 1 of the channel. For a differential length Δχ of the channel: where I _m is the drain current. The heat flux can be written as

F{x) = ¾»

dx

F(x ₊ Ax) = G; ^! - ^{dTiX + Ax)}

a ^s dx f(x) = G ^lc "(T(x)-T ^ref )

[0065] In the limit when Δχ→ 0 , the heat equation takes the form of a 2nd order non-homogeneous differential equation:

a ^{vg ~} dx ^> _ff Ho

[0066] If the temperature function for Subregion 1 is T _{ {x), Equation 23 can be written as

[0067] The solution of non-homogeneous differential Equation 24 can be written as

where

[0068] C, and C ₂ are constants whose values are determined below.

Subregion 2: Uniform cross-sectional area

[0069] Figure 6 shows Subregion 2 of the channel 104. The total resistance

Subregion 2 is denoted as R ₂ .

[0070] For a differential length Ax of the channel 104:

The heat flux can be written as long dT(x)

F(x) = G a ^' vg

dx

OX f(x) = G ^LA ' (T(x) - T ^REF )

[0071] In the limit when Δχ -» 0 , the heat equation takes the form of the following second-order non-homogeneous differential equation:

G' ^S - G ^1M (T(X) - r ^« )+ I _D ² _S R ₂ = o [0072] If the temperature function of Subregion 2 is T ₂ (x) , then Equation 26 can be written as 0 (27)

[0073] The solution of Equation 27 can be written as where

avg 2=

[0074] D _{ and D ₂ are constants whose values are determined using the boundary conditions, below.

Boundary Conditions and Complete Solution [0075] The temperatures of the source and drain ends 110,1 12 of the channel 104 are determined by boundary conditions. If the temperature at the source end 110 is T ₀ and at the drain end is T _L , then the two boundary conditions can be written as

UxM _{Xl =} »= ₀ (29)

[0076] The temperature at the pinch-off point 114 as determined by Equation 25 is the same as determined by Equation 28. Additionally, the heat flux leaving Subregion 1 enters Subregion 2. These facts provide two more boundary conditions:

dx,

[0077] Using Equations 25, 28, 29, 30, 31, and 32, the unknown coefficients, C, ,

C ₂ , £>, , and D ₂ can be calculated as:

T _n = +C,+T ^re/ --

Ψ

Qe ¹ " ¹ +C ₂ e ^{~ l} +T ^ref β

a' r = A+A +

Qlong

C H = C *-Ί -C *"Ί

where

( _e ¾ _ _e ^~ Ji ₊ J j _ _{+ e} - ^L _ . Y

{T _L e -{T ₀ o -T ^ref )e ^~ -T ^ref +

IT/2 β

-2

2

{T _L e ²² - ^e/ )e ¹¹ -T ^ref +

(l-e ²² )}

{{Τ ₀ -Τ ^Γί )ξ _χ ε ^ξ ^ -Γ _£ ² ¾ + ψ2

(ae ¹ + ') + β

Ψ ²

(ae ¹ + e ') + α -ξ ² ^

^~ ^ ² } D ₂

[0078] The temperature of the channel 104 along its length from the source end

1 10 to the drain end 112 can be written as

T _x {x _x ), 0≤x _l ≤L _i for0≤x

T x ₂ ), 0≤x ₂ ≤L ₂ forL _l ≤ where

L = L. + L, (40)

The Channel Temperature at Pinch-off [0079] The channel temperature at the pinch-off point 1 14 T _pinch is given as pinch ^~~

M-Network Representation of the Channel 104

[0080] The foregoing analysis is used to model steady-state (DC) temperature within the channel 104 of the MOSFET 100 using an electric circuit 700 as shown in Figure 7 ("M-Network 700"). Each of the nodes of the M-Network 700 corresponds to a location within the MOSFET 100, and the voltage at one of the nodes of the M-Network 700 represents the temperature at the corresponding location in the MOSFET 100. In this sense, the M-Network 700 is an electrical circuit that is equivalent to the steady-state thermal conditions of the channel 104. [0081 ] The M-Network 700 includes a voltage source 702 that is connected between a common node 720 that corresponds to the MOSFET 100's substrate 306 and a pinch-off node 722 that corresponds to the pinch-off point 114. The M-Network 700 also includes a source branch 704 that corresponds to the portion of the channel 104 between the source end 110 and the pinch-off point 1 14 (Subregion 1), and a drain branch 706 that corresponds to the portion of the channel 104 between the drain end 112 and the pinch- off point 114 (Subregion 2). The pinch-off node 722 acts as a dividing node that divides the source and drain branches 704,706 from each other, which are the branches of the circuit that model the two subregions of the channel 104.

[0082] Each of the source and drain branches 704,706 is connected in parallel between the pinch-off node 722 and the common node 720. Each of the source and drain branches 704,706 includes a first resistor 708,710 that has one end connected to the pinch-off node 722, and a parallel branch 728,730 that includes a current source 714,718 and a second resistor 712,716 connected together in parallel. In each of the source and drain branches 704,706, the parallel branch 728,730 is connected in series with the first resistor 708,710, and the parallel branch 728,730 and the first resistor 708,710 connect the pinch-off node 722 to the common node 720. The first resistor 708 in the source branch 704 has a conductance of 77, , the second resistor 712 in the parallel branch 728 of the source branch 704 ("source parallel branch 728") has a conductance of 6>, , and the current source 714 in the source parallel branch 728 has a magnitude of S _l . Similarly, the first resistor 710 in the drain branch 706 has a conductance of η ₂ , the second resistor 716 in the parallel branch 730 of the drain branch 706 ("drain parallel branch 730") has a conductance of θ ₂ , and the current source 718 in the drain parallel branch 730 has a magnitude of S ₂ . A voltage source of magnitude T _pinch is connected between the common node 720 and the pinch-off node 722; the magnitude of T _inch corresponds to the temperature of the pinch-off point. The node 724 between the source parallel branch 728 and the first resistor 708 of the source branch 704 corresponds to the source end 1 10 of the channel 104 ("source end node 724"), and the voltage T ₀ at this node 724 represents the temperature at the source end 1 10. Similarly, the node 726 between the drain parallel branch 730 and the first resistor 710 of the drain branch 706 corresponds to the drain end 1 12 of the channel 104 ("drain end node 726"), and the voltage T _L at this node 726 represents the temperature at the drain end 112. F ₀ represents the current at the source end node 724, and F _L represents the current at the drain end node 726. The source end and drain end nodes 724,726 are the ports of the M-Network 700. The conductances Θι,θ2 of the resistors 712,716 in the source and drain parallel branches 728,730 represent a thermal conduction path to ground.

[0083] F ₀ and F _L are given by 7 = ^ilo " ^s

⁰ - dx

dx

[0084] The requirement for conservation of flux (in electric circuit analysis known as irchoff s current law) results in the following equations:

F _L =( +0 ₂ )T _L - T _pinch +S ₂ where

[0085] Equations 41 and 42 can be solved and compared with Equations 43 and

44 to find out the values of η _{ ,η ₂ , , θ ₂ , 5, , and S ₂ :

f 2ξ ^ (e^ - e ^' ^ ) I _long 2ξ _{2 2¾½}

where = - + e ^h )* - (e^ + e ^~ ^ ¹ )(l - e ^ ² )

[0086] The heat equation can accordingly be analytically solved for the MOSFET

100, and the channel 104's temperature profile can be estimated. Physical device parameters are extracted from BSIM3 models; MOSFET geometry information is read from an extracted circuit layout in the SPICE format; saturation current and other variables for the M-Network 700 are determined; and then voltage at the nodes of the M- Network 700 are determined to determine the temperature at the locations within the MOSFET that correspond to those nodes. Subsequently, and in another embodiment, the temperature at any location within the channel can be analytically determined using Equations 25 and 28.

Integration in the VLSI CAD Flow [0087] Figure 8 shows a post-logic synthesis VLSI (Very-large-scale Integration)

CAD (Computer-aided Design) flow 800. At block 802, the netlist is generated; at block 804, placing and routing (layout) is performed; at block 806, post-layout logic verification and a formal equivalence check are performed; at block 808, physical verification is performed; and at block 810, prior to tape-out, thermal reliability verification is performed in accordance with the foregoing disclosure. If a problem is discovered during thermal verification, the layout of the IC can be changed at block 804, and blocks 806 to 810 can be repeated. Once the IC passes thermal verification, tape-out is performed at block 812.

Verification [0088] The foregoing describes solving the heat equation analytically. For a comparative analysis of the results of the method of the present disclosure versus a conventional method, the heat equation for both Subregions 1 and 2 of the channel 104 are solved using a conventional finite difference approach, below, and the results are compared to those determined analytically. The finite difference approach is based on Taylor's approximation for 2nd order derivatives given by:

f(x - h) - 2f(x) + f(x + h) _ , , /'» _L2

/ (x) - n

h 12 where, h is a small interval and f"(x) is the second derivative of function (x) . The second term on the right hand side of Equation 45 is the remainder term and is treated as approximation error. [0089] Below, thermal simulations on an n-type MOSFET 100 are performed using analytical and finite difference approaches. Figure 9 shows the layout of the MOSFET 100; the MOSFET 100 has a drawn length of 0.18 μιη and a drawn width of 0.40 μηι. The full SPICE BSIM3 model for the device is given below in Table 1 , while Table 2 lists non-BSIM3 parameters used in the simulations:

Table 1: BSIM3 Parameters used in Simulations

Table 2: Other Parameters Used in Simulations k Boltzmann constant 1.38x l0 ^"23 m ² kgs ^"2 K ^" '

Oxide dielectric 3.9 none

constant

Permittivity of air 8.85x l0 ^~12 F/m

Test Scenario using Externally Supplied Drain Current

[0090] In this test scenario, the temperature of the channel is determined while the MOSFET is subject to an externally supplied current. In this test, a current of 2 mA is supplied externally by a designer, the layout drawn length of the MOSFET is 0.28 μιη, the width is 0.40 μιη, the applied gate voltage is 1.0 V, the drain voltage is 1.5 V, the source end temperature is set to 565 , the drain end is set at 567 K, and the reference temperature is set to 456 K. Determined analytically, the average channel temperature is 586.19 K; the maximum channel temperature is 588.68 K at a distance of 0.21 15 μιη from the source end 1 10; and the temperature at the pinch-off point is 588.46 K at a distance of 0.2093 μηι from the source end.

[0091] Figure 10(a) graphs the analytical solution as a curve 1004 ("analytical curve 1004") shown in solid lines, and graphs two different finite difference solutions as curves 1004,1006 ("finite difference curves 1004,1006") shown in dashed lines. While there is a significant difference between the analytical curve 1004 and one of the finite difference curves 1006, when the step size used in the finite difference approach is reduced and its accuracy accordingly increased, the resulting finite difference curve 1004 more closely corresponds to the analytical curve 1004.

Test Scenario for a Smaller MOSFET [0092] In this test, the layout drawn length and width of the MOSFET are respectively 0.18 μηι and 0.40 μπι, and the gate and drain voltages are both 1.5 V. The source end temperature is 565 , the drain end temperature is 567 K, and the reference temperature is 456 K. Figure 10(b) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum channel temperature is 570.52 K at a distance of 0.1 14 μ ^η ι from the source end; the temperature at the pinch-off point is 570.36 K at a distance 0.109 μηι along the length of the channel from the source end; and the saturation current is 0.269 mA.

Test Scenario for the Case When the Source, Drain, and the Reference Temperatures are Identical [0093] In this test, the layout drawn length of the MOSFET is 0.18 μπι and the width is 0.40 μηι, the applied gate voltage is 1.5 V, the drain voltage is 1.5 V, and the source, drain, and reference temperatures all are set to 10 K. Figure 10(c) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. The drain current is 0.2699 mA. Determined analytically, the average channel temperature is 5.05 K; the maximum channel temperature is 8.1 at a distance of 0.1 124 μηι along the length of the channel from the source end; and the temperature at the pinch-off point is 7.95 at a distance of 0.109 μπι from the source end.

[0094] Below, test scenarios are described that compare the analytical and conventional finite difference approaches when the MOSFET operates in different modes.

Saturation Mode of Operation

[0095] In the saturation mode, the MOSFET is on and it conducts current between the source and the drain. The MOSFET threshold voltage for the BSIM3 technology file used in this work is 0.39V. The value of λ is 0.20. The following tests are performed with the MOSFET in the saturation mode.

Test Scenario When Gate and Drain are at Same Voltage

[0096] In this test, the source and drain temperatures are set to 325 K respectively, and the reference temperature is set to 300 K. The applied gate voltage is 1.5 V and the drain voltage is 1.5 V. The layout drawn width of the MOSFET is 0.40 μιη and the length is 0.18 μ ^η ι. The saturation drain current is 0.2699 mA. Figure 10(d) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum channel temperature is 330.57 at a distance of 0.1 13 μπι from the source end; and the temperature at the pinch-off point is 330.46 at a distance 0.109 μηι along the length of the channel from the source end. Test Scenario for the Case of Different Gate and Drain Voltages

[0097] In this test, the source and the drain end temperatures are set to 325 K respectively, and the reference temperature is set to 300 K. The applied gate voltage is 1.8 V and the drain voltage is 2.2 V. The layout drawn width of MOSFET is 0.40 μηι and the length is 0.18 μιη. The saturation drain current is 0.4322 mA. Figure 10(e) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum channel temperature is 338.12 at a distance 0.1 137 μιη from the source end; and the temperature at the pinch-off point is 337.81 K at a distance 0.108 μηι from the source end. Test Scenario for the Case of High Gate and Drain Voltages

[0098] In this test, source and drain temperatures are set to 325 K respectively, and the reference temperature is set to 300 K. The applied gate and drain voltages are both 5.0 V. The layout drawn width of the MOSFET is 0.18 μιη and the length is 0.40 The saturation drain current to be 4.52 mA. Figure 10(f) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the average channel temperature for this case is 460.66 ; the maximum channel temperature is 556.00 at a distance 0.1 102 μπι from the source end; and the temperature at the pinch-off point is 550.26 K at a distance 0.10631 μιη from the source end. Test Scenario for a Large MOSFET Device with High Drain Current

[0099] In this test, the source and the drain end temperatures are set to 325 respectively, and the reference temperature is set to 300 K. The applied gate and drain voltages are both 5.0 V. The layout drawn width of the MOSFET is 0.40 μιη and the length is 0.28 μπι. The saturation drain current is 2.689 mA. Figure 10(g) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the average channel temperature for this case is 429.03 K; the maximum temperature is 500.50 K at a distance 0.208 μηι from the source end; and the temperature at the pinch-off point is 499.17 K at a distance 0.206 μπι from the source end.

Test Scenario for Different Source/Drain Temperatures and Voltages

[00100] In this test, the source end temperature is set to 318 K, the drain end temperature is set to 324 K, and the reference temperature is set to 298 K. The applied gate voltage is 1.2 V and the drain voltage is 1.8 V. The layout drawn width of the MOSFET is 0.40 μιη and the length is 0.18 μηι. The saturation drain current is 0.145 mA. Figure 10(h) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum temperature is 326.97 at a distance of 0.1 18 μιη from the source end; and the temperature at the pinch-off point is 326.58 at a distance of 0.109 μιη from the source end.

Linear/Ohmic Mode of Operation

[00101] When the MOSFET operates in the linear mode, the drain current increases linearly with the drain voltage. Under these conditions the MOSFET behaves as a voltage dependent resistor whose resistance is determined by the gate voltage. The current and the voltage follow the ohmic relationship in this mode of operation. The following tests are performed with the MOSFET in the linear mode.

Test Scenario for the Case of Different Temperatures at the Source and the Drain

[00102] In this test, the source end temperature is set to 300 K, the drain end temperature is set to 325 , and the reference temperature has been set to 300 K. The applied gate voltage is 1.5 V and the drain voltage is 1.0 V. The layout drawn width of MOSFET is 0.40 μπι and the length is 0.18 μηι. Linear mode drain current is determined to be 0.0245 mA. Figure 10(i) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum channel temperature is 325 at a distance of 0.146 μπι from the source end; and the temperature at the pinch-off point is 318.97 at a distance of 0.1 10 μπι from the source end. Test Scenario for a Larger Device in the Ohmic Operating Subregion

[00103] In this test, the source end temperature is set to 318 K, the drain end temperature is set to 324 K, and the reference temperature is set to 300 K. The applied gate voltage is 1.0 V and the drain voltage is 0.1 V. The layout drawn width of the MOSFET is 0.40 μηι and the length is 0.28 μπι. A drain current of 0.01455 mA is determined. Figure 10(j) shows both the analytical and finite difference results as the analytical curve 1004 and the finite difference curve 1006, respectively. Determined analytically, the maximum channel temperature is 324 at a distance of 0.246 μηι from the source end; and the temperature at the pinch-off point is 323.25 K at a distance of 0.215 μιη from the source end. [00104] As evident from Figures 10(a) to (j), the analytical and finite difference approaches correspond to a high degree so long as a sufficiently small step size is used when using the finite difference approach.

[00105] Referring now to Figure 11, there is shown another embodiment in which the M-Network 700 is expanded so that the MOSFET 100 is modeled from its source netlist node 116 to its drain netlist node 118, instead of only from the source end 110 to the drain end 112 of the channel 104, as is done in Figure 7. Connected across the source end node 724 and the common node 720 of the M-Network 700 are a pair of current sources 1 104a,b between which is connected a resistive pi network 1 102; these current sources 1 104a,b and the pi network 1102 thermally model the portion of the MOSFET 100 between the source end 110 of the channel 104 and the source netlist node 1 16. Similarly, connected across the drain end node 726 and the common node 720 are another pair of current sources 1 108a,b and another resistive pi network 1 106; these current sources 1 108a,b and the pi network 1 106 thermally model the portion of the MOSFET 100 between the drain end 1 12 of the channel 104 and the drain netlist node 1 18. The magnitude of each of the current sources 1 104a,b connected to the source end node 724 is 0.5·ψ ₅ , while the resistors in the pi network 1 102 have resistances of a _s , β ₅ , and β ₅ . Similarly, each of the current sources 1 108a,b connected to the drain end node 726 is 0.5·ψ(ΐ, while the resistors in the pi network 1 106 have resistances of ο¾, Pd, and Pd. The circuit shown in Figure 1 1 can be simplified to result in the embodiment of the M- Network 700 shown in Figure 12, which is structurally identical to the embodiment of the M-Network 700 of Figure 7 but whose components instead have the following magnitudes:

*?

<Χ _α + βα + ^θ 2 + η ₂ α ₅ η ₂

i?3 - α ₅ + β ₅ + θ _ί + η _χ

α _α + β _α + θ ₂ + η ₂

θ ₃ = β +

α ₅ + β ₅ + θ ₁ + _ηι ftd (S ₂ - Μ - ΰ-5ψά(βα + θ ₂ + η ₂ )

"■α + βα + θ ₂ + η ₂ as t - i s) - 0.5x s (β ₅ + θ ₁ + η _ί )

The voltages, and accordingly the temperatures, at the source and drain netlist nodes 1 16, 1 18 are respectively labelled T _ne tiist source and T _ne tiist drain in Figures 1 1 and 12.

[00106] Referring now to Figures 13 and 14, there are respectively shown an embodiment of a method 1300 for estimating a diffusion potential of a diffusive property, and an embodiment of a system 1400 for estimating a diffusion potential of a diffusive property. The system 1400 includes a controller 1402; a computer readable medium 1404 that is communicatively coupled to the controller 1402; a display 1406 that is communicatively coupled to the controller 1402; and an input device, such as a keyboard 1408, that is communicatively coupled to the controller 1402.

[00107] The method 1300 is encoded on to the computer readable medium 1404, and the controller 1402 accordingly performs the method 1300. At block 1302 the controller 1402 begins performing the method 1300, and proceeds immediately to block 1304. At block 1304 the controller 1402 models a portion of the diffusion region, such as the channel 104 of the MOSFET 100, using a circuit, such as the M-Network 700. While the depicted embodiment of the M-Network 700 is an electrical circuit, in alternative embodiments (not depicted) the M-Network 700 may be, for example, a thermal circuit, a pneumatic circuit, or a hydraulic circuit. Depending on the embodiment, the particular circuit potential of the M-Network 700 that corresponds to the diffusion potential may vary. For example, when the M-Network 700 is an electrical circuit as it is in Figure 7, the circuit potential that corresponds to the diffusion potential is voltage. As another example, in an embodiment in which the M-Network 700 is a hydraulic circuit, the circuit potential is pressure.

[00108] After the diffusion region is modeled using the M-Network 700, the controller 1402 proceeds to block 1304 and simulates operation of the M-Network 700 to determine the circuit potentials at various nodes at the M-Network 700; as noted above, as the M-Network in the depicted embodiment is an electrical circuit, the voltages at the various nodes of the M-Network 700 correspond to the temperature at various locations within the diffusion region of the MOSFET 700. Simulation may be performed using a circuit simulator such as SPICE. In the embodiment of the M-Network 700 of Figure 7, the diffusion region is the channel 104 of the MOSFET 100; in the embodiment of the M- Network of Figure 12, the diffusion region is the channel 104 and the portions of the MOSFET 100 between the source and drain ends 110,1 12 and the source and drain netlist nodes 116,118. The controller 1402 utilizes the following input variables, which a user can supply via the keyboard 1408:

(a) the temperatures at the source end 1 10 and the drain end 1 12 or at the source and drain netlist nodes 1 16, 1 18; (b) the temperature of the substrate 306, which acts as T ^ret ;

(c) gate voltage (V _gs );

(d) drain voltage (V _ds );

(e) substrate bias voltage (Vb _s ); and

(f) a netlist extracted from layout of the IC.

[00109] The controller 1402 outputs any one or more of the following in a text file or on the display 1406, for example:

(a) the temperature distribution along the length of the channel 104;

(b) drain current (¾);

(c) average thermal conductance;

(d) average channel temperature;

(e) maximum channel temperature;

(f the temperature at the pinch-off point 1 14; and

(g) the effective length and width of the channel.

[001 10] The controller 1402 subsequently proceeds to block 1306, where the method 1300 ends.

[001 1 1] Beneficially, the foregoing method 1300 and system 1400 allow a netlist to be used to model operation of a diffusion region, such as between the source and drain netlist nodes 116,118 of the MOSFET 100, in multiple physical domains. For example, with respect to the MOSFET 100, a netlist is conventionally used to model the MOSFET 100's behaviour in the electrical domain, and the method 1300 and system 1400 also allow a netlist to be used to model the MOSFET 100 in the thermal domain. This can potentially be advantageous for several reasons. One potential advantage is rapid solution: problem matrices in the different domains have a common sparsity pattern whose solution topology can be determined once (a computationally expensive procedure) and then re-used for all physical domains to achieve faster calculation. MOSFET channels 104 are commonly described electrically by resistors, the simplest form of two-port network. The electric circuit topology of a VLSI circuit can thus be reused, courtesy of the M-network 700, to determine the temperature profile in the same circuit, including the temperature profile within MOSFET devices. Anything other than a thermal-domain two-port network to describe the MOSFET channel 104 would require a costly reformulation of the matrix problem for the thermal domain. Another potential advantage is repurposing of electrical parasitic extraction software tools and component descriptions in the thermal domain. Each extracted circuit component (resistor, capacitor, MOSFET) can have two-port electrical and thermal domain interpretations. The M- Network 700 can be used to improve the accuracy of thermal analysis of MOSFET devices within VLSI circuits over the accuracy of a pi-network model of the channel 104, but does not require information beyond that which is reasonably available from a parasitic extraction and standard device models.

[00112] While the foregoing embodiments are directed at modeling a single diffusion region that is divided into two subregions, in alternative embodiments (not depicted) multiple diffusion regions can be modeled. For example, in an embodiment in which a collection of MOSFETs 100 are electrically coupled together, the channel 104 of each of the MOSFETs 100 may be thermally modeled using one M-Network 700, and the M-Networks 700 of each of the MOSFETs may be coupled together to model the collection of MOSFETs 100.

[001 13] The controller 1402 may be any suitable type of controller, such as a processor, microcontroller, programmable logic controller, field programmable gate array, or can be implemented in hardware using, for example, an application-specific integrated circuit. Exemplary computer readable media include disc-based media such as CD-ROMs and DVDs, magnetic media such as hard drives and other forms of magnetic disk storage, semiconductor based media such as flash media, random access memory, and read only memory. [001 14] For the sake of convenience, the example embodiments above are described as various interconnected functional blocks or distinct software modules. This is not necessary, however, and there may be cases where these functional blocks or modules are equivalently aggregated into a single logic device, program or operation with unclear boundaries. In any event, the functional blocks or software modules can be implemented by themselves, or in combination with other operations in either hardware or software.

[001 15] It is contemplated that any part of any aspect or embodiment discussed in this specification can be implemented or combined with any part of any other aspect or embodiment discussed in this specification.

[00116] While particular embodiments have been described in the foregoing, it is to be understood that other embodiments are possible and are intended to be included herein. It will be clear to any person skilled in the art that modifications of and adjustments to the foregoing embodiments, not shown, are possible. The scope of the claims should not be limited by the embodiments set forth in the examples, but should be given the broadest possible interpretation consistent with the description as a whole.